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authorMike Habeck <habeck@sgi.com>2007-11-26 11:19:57 -0600
committerTony Luck <tony.luck@intel.com>2007-12-07 16:11:37 -0800
commitafc2cf35b43ca58bd73b86b2f72af8b9bdb67ab8 (patch)
tree7f89e7dbcc3b5cfe4dbb881e159b9ecaa4634164 /arch/ia64/hp
parent9e004ebd2dab980d663784d096aa6dc449225bd8 (diff)
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[IA64] SGI Altix : fix bug in sn_io_late_init()
When initializing pci_controller->node to point to the closest node we need to take into consideration that a PIC PCI Bridge ASIC can be connected to a headless/memless node just like the TIOCP and TIOCE Bridge ASICs Signed-off-by: Mike Habeck <habeck@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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