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authorMark Salter <msalter@redhat.com>2011-10-04 11:10:50 -0400
committerMark Salter <msalter@redhat.com>2011-10-06 19:48:07 -0400
commit81ec98898188639ac53413605681b3e3bb0a2ff1 (patch)
treeba8a4c16120f0e9c2fd2fe5c9e5f7acc0a56e652 /arch/c6x/include/asm/cache.h
parente94e668251ab31b17ef6dcd16ba7fe05ffc1917a (diff)
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C6X: clocks
The C6X SoCs contain several PLL controllers each with up to 16 clock outputs feeding into the cores or peripheral clock domains. The hardware is very similar to arm/mach-davinci clocks. This is still a work in progress which needs to be updated once device tree clock binding changes shake out. Signed-off-by: Mark Salter <msalter@redhat.com> Signed-off-by: Aurelien Jacquiot <a-jacquiot@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
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