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| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-08-16 18:42:58 +0100 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-08-16 18:42:58 +0100 |
| commit | e4862f2f6f5653dfb67f3ba2b6f0bc74516ed51a (patch) | |
| tree | 1db5a0540a4eecfad9b7daee476b985e82ddc810 /arch/blackfin/mach-common/cache.S | |
| parent | ec62dbd7eb8e3dddb221da89ecbcea0fc3dee8c1 (diff) | |
| parent | b2c1e07b81a126e5846dfc3d36f559d861df59f4 (diff) | |
| download | blackbird-op-linux-e4862f2f6f5653dfb67f3ba2b6f0bc74516ed51a.tar.gz blackbird-op-linux-e4862f2f6f5653dfb67f3ba2b6f0bc74516ed51a.zip | |
Merge branch 'for-2.6.36' into for-2.6.37
Fairly simple conflicts, the most serious ones are the i.MX ones which I
suspect now need another rename.
Conflicts:
arch/arm/mach-mx2/clock_imx27.c
arch/arm/mach-mx2/devices.c
arch/arm/mach-omap2/board-rx51-peripherals.c
arch/arm/mach-omap2/board-zoom2.c
sound/soc/fsl/mpc5200_dma.c
sound/soc/fsl/mpc5200_dma.h
sound/soc/fsl/mpc8610_hpcd.c
sound/soc/pxa/spitz.c
Diffstat (limited to 'arch/blackfin/mach-common/cache.S')
| -rw-r--r-- | arch/blackfin/mach-common/cache.S | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/arch/blackfin/mach-common/cache.S b/arch/blackfin/mach-common/cache.S index ea540318a228..790c767ca95a 100644 --- a/arch/blackfin/mach-common/cache.S +++ b/arch/blackfin/mach-common/cache.S @@ -11,7 +11,11 @@ #include <asm/cache.h> #include <asm/page.h> +#ifdef CONFIG_CACHE_FLUSH_L1 +.section .l1.text +#else .text +#endif /* 05000443 - IFLUSH cannot be last instruction in hardware loop */ #if ANOMALY_05000443 @@ -64,17 +68,6 @@ /* Invalidate all instruction cache lines assocoiated with this memory area */ ENTRY(_blackfin_icache_flush_range) -/* - * Walkaround to avoid loading wrong instruction after invalidating icache - * and following sequence is met. - * - * 1) One instruction address is cached in the instruction cache. - * 2) This instruction in SDRAM is changed. - * 3) IFLASH[P0] is executed only once in blackfin_icache_flush_range(). - * 4) This instruction is executed again, but the old one is loaded. - */ - P0 = R0; - IFLUSH[P0]; do_flush IFLUSH ENDPROC(_blackfin_icache_flush_range) |
