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| author | Paul Walmsley <paul@pwsan.com> | 2011-02-25 14:53:40 -0700 |
|---|---|---|
| committer | Paul Walmsley <paul@pwsan.com> | 2011-03-07 20:21:17 -0700 |
| commit | a4fc92748e969b1312f283b0d1baf657329f2907 (patch) | |
| tree | 791bfaed29aaaae3ca7f69911171937288f457ab /arch/arm | |
| parent | 691abf525d3d215f2e4eab7a015ef2b6375c58a5 (diff) | |
| download | blackbird-op-linux-a4fc92748e969b1312f283b0d1baf657329f2907.tar.gz blackbird-op-linux-a4fc92748e969b1312f283b0d1baf657329f2907.zip | |
OMAP2xxx: clock: fix clockdomains on gpt7_ick, 2430 mmchs2_fck clocks
Add a clockdomain to the GPTIMER7 interface and 2430 HSMMC2 functional
clocks - both were previously missing them.
Also, the 2430 mmchs1_fck is in core_l3_clkdm, but should be in
core_l4_clkdm; fix this.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/mach-omap2/clock2420_data.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-omap2/clock2430_data.c | 4 |
2 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c index 53bd999c63ae..5e80d3dc274c 100644 --- a/arch/arm/mach-omap2/clock2420_data.c +++ b/arch/arm/mach-omap2/clock2420_data.c @@ -987,6 +987,7 @@ static struct clk gpt7_ick = { .name = "gpt7_ick", .ops = &clkops_omap2_iclk_dflt_wait, .parent = &l4_ck, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT7_SHIFT, .recalc = &followparent_recalc, diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c index 36dde2635acb..8957fc6f64e5 100644 --- a/arch/arm/mach-omap2/clock2430_data.c +++ b/arch/arm/mach-omap2/clock2430_data.c @@ -975,6 +975,7 @@ static struct clk gpt7_ick = { .name = "gpt7_ick", .ops = &clkops_omap2_iclk_dflt_wait, .parent = &l4_ck, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT7_SHIFT, .recalc = &followparent_recalc, @@ -1747,7 +1748,7 @@ static struct clk mmchs1_fck = { .name = "mmchs1_fck", .ops = &clkops_omap2_dflt_wait, .parent = &func_96m_ck, - .clkdm_name = "core_l3_clkdm", + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHS1_SHIFT, .recalc = &followparent_recalc, @@ -1767,6 +1768,7 @@ static struct clk mmchs2_fck = { .name = "mmchs2_fck", .ops = &clkops_omap2_dflt_wait, .parent = &func_96m_ck, + .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHS2_SHIFT, .recalc = &followparent_recalc, |
