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authorStepan Moskovchenko <stepanm@codeaurora.org>2011-02-28 16:04:56 -0800
committerDavid Brown <davidb@codeaurora.org>2011-03-08 14:42:31 -0800
commitc7831df3937f54bddc20128892a75373549516d0 (patch)
treef08ba68191ec24b5d8572bb3cfe1de3ca69ad9a5 /arch/arm
parentb0e7808d548ea1d857216d31d63078411203a116 (diff)
downloadblackbird-op-linux-c7831df3937f54bddc20128892a75373549516d0.tar.gz
blackbird-op-linux-c7831df3937f54bddc20128892a75373549516d0.zip
msm: iommu: Enable HTW L2 redirection on MSM8960
Allow the MSM8960 IOMMU to access its page tables directly through the L2 cache. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-msm/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index 997c5bda8c18..1516896e8d17 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -162,7 +162,7 @@ config MSM_IOMMU
config IOMMU_PGTABLES_L2
def_bool y
- depends on ARCH_MSM8X60 && MMU && SMP && CPU_DCACHE_DISABLE=n
+ depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
config MSM_DEBUG_UART
int
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