diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-06-09 10:12:41 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-06-09 10:13:16 +0100 |
commit | a0a54d37b4b1d1f55d1e81e8ffc223bb85472fa3 (patch) | |
tree | 3a3340b42833020a7f25d7ebe015d2d831f0c228 /arch/arm | |
parent | 07989b7ad63af424886ff922fd3bcca9e00ffa78 (diff) | |
download | blackbird-op-linux-a0a54d37b4b1d1f55d1e81e8ffc223bb85472fa3.tar.gz blackbird-op-linux-a0a54d37b4b1d1f55d1e81e8ffc223bb85472fa3.zip |
Revert "ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks"
This reverts commit 45b95235b0ac86cef2ad4480b0618b8778847479.
Will Deacon reports that:
In 52af9c6c ("ARM: 6943/1: mm: use TTBR1 instead of reserved context ID")
I updated the ASID rollover code to use only the kernel page tables
whilst updating the ASID.
Unfortunately, the code to restore the user page tables was part of a
later patch which isn't yet in mainline, so this leaves the code
quite broken.
We're also in the process of eliminating __ARCH_WANT_INTERRUPTS_ON_CTXSW
from ARM, so lets revert these until we can properly sort out what we're
doing with the context switching.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mm/context.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mm/context.c b/arch/arm/mm/context.c index b6c776ae4039..b0ee9ba3cfab 100644 --- a/arch/arm/mm/context.c +++ b/arch/arm/mm/context.c @@ -93,7 +93,7 @@ static void reset_context(void *info) return; smp_rmb(); - asid = cpu_last_asid + cpu; + asid = cpu_last_asid + cpu + 1; flush_context(); set_mm_context(mm, asid); @@ -143,13 +143,13 @@ void __new_context(struct mm_struct *mm) * to start a new version and flush the TLB. */ if (unlikely((asid & ~ASID_MASK) == 0)) { - asid = cpu_last_asid + smp_processor_id(); + asid = cpu_last_asid + smp_processor_id() + 1; flush_context(); #ifdef CONFIG_SMP smp_wmb(); smp_call_function(reset_context, NULL, 1); #endif - cpu_last_asid += NR_CPUS - 1; + cpu_last_asid += NR_CPUS; } set_mm_context(mm, asid); |