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author | Sudhakar Rajashekhara <sudhakar.raj@ti.com> | 2009-05-21 07:41:35 -0400 |
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committer | Kevin Hilman <khilman@deeprootsystems.com> | 2009-08-26 10:56:56 +0300 |
commit | 60902a2cb12c3c1682ee7a04ad7448ec16dc0c29 (patch) | |
tree | ba754bff7fadd7106dc9f8549136a514177d0fd1 /arch/arm/plat-s3c/clock.c | |
parent | 4c5adde7943b982d22a7bf711654fbb5cb810667 (diff) | |
download | blackbird-op-linux-60902a2cb12c3c1682ee7a04ad7448ec16dc0c29.tar.gz blackbird-op-linux-60902a2cb12c3c1682ee7a04ad7448ec16dc0c29.zip |
davinci: EDMA: multiple CCs, channel mapping and API changes
- restructure to support multiple channel controllers by using
additional struct resources for each CC
- interface changes visible to EDMA clients
Introduce macros to build IDs from controller and channel number,
and to extract them. Modify the edma_alloc_slot function to take an
extra argument for the controller.
Also update ASoC drivers to use API. ASoC changes
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
- Move queue related mappings to dm<soc>.c
EDMA in DM355 and DM644x has two transfer controllers while DM646x
has four transfer controllers. Moving the queue to tc mapping and
queue priority mapping to dm<soc>.c will be helpful to probe these
mappings from platform device so that the machine_is_* testing will
be avoided.
- add channel mapping logic
Channel mapping logic is introduced in dm646x EDMA. This implies
that there is no fixed association for a channel number to a
parameter entry number. In other words, using the DMA channel
mapping registers (DCHMAPn), a PaRAM entry can be mapped to any
channel. While in the case of dm644x and dm355 there is a fixed
mapping between the EDMA channel and Param entry number.
Signed-off-by: Naresh Medisetty <naresh@ti.com>
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Reviewed-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/plat-s3c/clock.c')
0 files changed, 0 insertions, 0 deletions