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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2012-10-30 11:12:46 +0100
committerThomas Petazzoni <thomas.petazzoni@free-electrons.com>2012-11-20 15:58:56 +0100
commitc08f1495c886f70f99af7fdcbabe612b31b97d4a (patch)
treed4e82367e3f313aa677ff1fdb14d35d387c9e6da /arch/arm/plat-orion
parentdd2c57b822bc0fc999f95c57933e4c597e765b0a (diff)
downloadblackbird-op-linux-c08f1495c886f70f99af7fdcbabe612b31b97d4a.tar.gz
blackbird-op-linux-c08f1495c886f70f99af7fdcbabe612b31b97d4a.zip
arm: plat-orion: remove unused orion_xor_init_channels()
Now that xor0 and xor1 are registered in a single driver manner, the orion_xor_init_channels() function has become useless. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Diffstat (limited to 'arch/arm/plat-orion')
-rw-r--r--arch/arm/plat-orion/common.c20
1 files changed, 0 insertions, 20 deletions
diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
index afbbb97937ea..c6e6666986ff 100644
--- a/arch/arm/plat-orion/common.c
+++ b/arch/arm/plat-orion/common.c
@@ -606,26 +606,6 @@ void __init orion_wdt_init(void)
****************************************************************************/
static u64 orion_xor_dmamask = DMA_BIT_MASK(32);
-void __init orion_xor_init_channels(
- struct mv_xor_platform_data *orion_xor0_data,
- struct platform_device *orion_xor0_channel,
- struct mv_xor_platform_data *orion_xor1_data,
- struct platform_device *orion_xor1_channel)
-{
- /*
- * two engines can't do memset simultaneously, this limitation
- * satisfied by removing memset support from one of the engines.
- */
- dma_cap_set(DMA_MEMCPY, orion_xor0_data->cap_mask);
- dma_cap_set(DMA_XOR, orion_xor0_data->cap_mask);
- platform_device_register(orion_xor0_channel);
-
- dma_cap_set(DMA_MEMCPY, orion_xor1_data->cap_mask);
- dma_cap_set(DMA_MEMSET, orion_xor1_data->cap_mask);
- dma_cap_set(DMA_XOR, orion_xor1_data->cap_mask);
- platform_device_register(orion_xor1_channel);
-}
-
/*****************************************************************************
* XOR0
****************************************************************************/
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