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authorLinus Torvalds <torvalds@linux-foundation.org>2012-07-23 16:31:31 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2012-07-23 16:31:31 -0700
commitf01b9b73f57f4f92d39bba0d9aa4a38f318212df (patch)
treeb815a4477af34f7f6c61dff0c04db6cb975cdd55 /arch/arm/plat-omap/include/plat/cpu.h
parentfde75430278130505cac21997cd9f90b7bb2670a (diff)
parent66314223aa5e862c9d1d068cb7186b4fd58ebeaa (diff)
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Merge tag 'newsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull support for three new arm SoC types from Arnd Bergmann: - The mvebu platform includes Marvell's Armada XP and Armada 370 chips, made by the mvebu business unit inside of Marvell. Since the same group also made the older but similar platforms we call "orion5x", "kirkwood", "mv78xx0" and "dove", we plan to move all of them into the mach-mvebu directory in the future. - socfpga is Altera's platform based on Cortex-A9 cores and a lot of FPGA space. This is similar to the Xilinx zynq platform we already support. The code is particularly clean, which is helped by the fact that the hardware doesn't do much besides the parts that are expected to get added in the FPGA. - The OMAP subarchitecture gains support for the latest generation, the OMAP5 based on the new Cortex-A15 core. Support is rather rudimentary for now, but will be extended in the future. * tag 'newsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (25 commits) ARM: socfpga: initial support for Altera's SOCFPGA platform arm: mvebu: generate DTBs for supported SoCs ARM: mvebu: MPIC: read number of interrupts from control register arm: mach-mvebu: add entry to MAINTAINERS arm: mach-mvebu: add compilation/configuration change arm: mach-mvebu: add defconfig arm: mach-mvebu: add documentation for new device tree bindings arm: mach-mvebu: add support for Armada 370 and Armada XP with DT arm: mach-mvebu: add source files arm: mach-mvebu: add header clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver ARM: Kconfig update to support additional GPIOs in OMAP5 ARM: OMAP5: Add the build support arm/dts: OMAP5: Add omap5 dts files ARM: OMAP5: board-generic: Add device tree support ARM: omap2+: board-generic: clean up the irq data from board file ARM: OMAP5: Add SMP support ARM: OMAP5: Add the WakeupGen IP updates ARM: OMAP5: l3: Add l3 error handler support for omap5 ARM: OMAP5: gpmc: Update gpmc_init() ... Conflicts: Documentation/devicetree/bindings/arm/omap/omap.txt arch/arm/mach-omap2/Makefile drivers/clocksource/Kconfig drivers/clocksource/Makefile
Diffstat (limited to 'arch/arm/plat-omap/include/plat/cpu.h')
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h22
1 files changed, 20 insertions, 2 deletions
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index f91e0b99b30c..68b180edcfff 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -9,7 +9,7 @@
*
* Written by Tony Lindgren <tony.lindgren@nokia.com>
*
- * Added OMAP4 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
+ * Added OMAP4/5 specific defines - Santosh Shilimkar<santosh.shilimkar@ti.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -70,6 +70,7 @@ unsigned int omap_rev(void);
* cpu_is_omap443x(): True for OMAP4430
* cpu_is_omap446x(): True for OMAP4460
* cpu_is_omap447x(): True for OMAP4470
+ * soc_is_omap543x(): True for OMAP5430, OMAP5432
*/
#define GET_OMAP_CLASS (omap_rev() & 0xff)
@@ -122,6 +123,7 @@ IS_OMAP_CLASS(24xx, 0x24)
IS_OMAP_CLASS(34xx, 0x34)
IS_OMAP_CLASS(44xx, 0x44)
IS_AM_CLASS(35xx, 0x35)
+IS_OMAP_CLASS(54xx, 0x54)
IS_AM_CLASS(33xx, 0x33)
IS_TI_CLASS(81xx, 0x81)
@@ -133,6 +135,7 @@ IS_OMAP_SUBCLASS(363x, 0x363)
IS_OMAP_SUBCLASS(443x, 0x443)
IS_OMAP_SUBCLASS(446x, 0x446)
IS_OMAP_SUBCLASS(447x, 0x447)
+IS_OMAP_SUBCLASS(543x, 0x543)
IS_TI_SUBCLASS(816x, 0x816)
IS_TI_SUBCLASS(814x, 0x814)
@@ -156,6 +159,8 @@ IS_AM_SUBCLASS(335x, 0x335)
#define cpu_is_omap443x() 0
#define cpu_is_omap446x() 0
#define cpu_is_omap447x() 0
+#define soc_is_omap54xx() 0
+#define soc_is_omap543x() 0
#if defined(MULTI_OMAP1)
# if defined(CONFIG_ARCH_OMAP730)
@@ -285,6 +290,7 @@ IS_OMAP_TYPE(3430, 0x3430)
#define cpu_is_omap2430() 0
#define cpu_is_omap3430() 0
#define cpu_is_omap3630() 0
+#define soc_is_omap5430() 0
/*
* Whether we have MULTI_OMAP1 or not, we still need to distinguish
@@ -355,11 +361,18 @@ IS_OMAP_TYPE(3430, 0x3430)
# define cpu_is_omap447x() is_omap447x()
# endif
+# if defined(CONFIG_SOC_OMAP5)
+# undef soc_is_omap54xx
+# undef soc_is_omap543x
+# define soc_is_omap54xx() is_omap54xx()
+# define soc_is_omap543x() is_omap543x()
+#endif
+
/* Macros to detect if we have OMAP1 or OMAP2 */
#define cpu_class_is_omap1() (cpu_is_omap7xx() || cpu_is_omap15xx() || \
cpu_is_omap16xx())
#define cpu_class_is_omap2() (cpu_is_omap24xx() || cpu_is_omap34xx() || \
- cpu_is_omap44xx())
+ cpu_is_omap44xx() || soc_is_omap54xx())
/* Various silicon revisions for omap2 */
#define OMAP242X_CLASS 0x24200024
@@ -412,9 +425,14 @@ IS_OMAP_TYPE(3430, 0x3430)
#define OMAP447X_CLASS 0x44700044
#define OMAP4470_REV_ES1_0 (OMAP447X_CLASS | (0x10 << 8))
+#define OMAP54XX_CLASS 0x54000054
+#define OMAP5430_REV_ES1_0 (OMAP54XX_CLASS | (0x30 << 16) | (0x10 << 8))
+#define OMAP5432_REV_ES1_0 (OMAP54XX_CLASS | (0x32 << 16) | (0x10 << 8))
+
void omap2xxx_check_revision(void);
void omap3xxx_check_revision(void);
void omap4xxx_check_revision(void);
+void omap5xxx_check_revision(void);
void omap3xxx_check_features(void);
void ti81xx_check_features(void);
void omap4xxx_check_features(void);
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