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| author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2010-11-29 08:58:14 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-12-03 11:05:10 +0100 |
| commit | 4c6c32b3f856346158161a8c9824b4dd2bff0893 (patch) | |
| tree | 44d7866c70dae5a6501c3d4a96c7b0493a5ba856 /arch/arm/plat-mxc/include/mach/mx25.h | |
| parent | 29bb6afcb077bd153c7738e73840dde808132fb5 (diff) | |
| download | blackbird-op-linux-4c6c32b3f856346158161a8c9824b4dd2bff0893.tar.gz blackbird-op-linux-4c6c32b3f856346158161a8c9824b4dd2bff0893.zip | |
ARM: mx25: fix offset for usb host controller
In commit 2c20b9f (ARM: mx25: dynamically allocate mxc-ehci devices) I
changed the offset to the value specified in the reference manual
intending to test this change on hardware. This slipped through and now
prooved to be wrong. So fix it and add a comment about the
documentation being wrong.
Reported-by: Jaume Ribot <jaume@fqingenieria.es>
Cc: Michael Trimarchi <trimarchi@gandalf.sssup.it>
Cc: Shawn Guo <shawn.gsc@gmail.com>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx25.h')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx25.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index 024bebe4da11..087cd7ac8d52 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h @@ -49,7 +49,12 @@ #define MX25_SDMA_BASE_ADDR 0x53fd4000 #define MX25_USB_BASE_ADDR 0x53ff4000 #define MX25_USB_OTG_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0000) -#define MX25_USB_HS_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0200) +/* + * The reference manual (IMX25RM, Rev. 1, 06/2009) specifies an offset of 0x200 + * for the host controller. Early documentation drafts specified 0x400 and + * Freescale internal sources confirm only the latter value to work. + */ +#define MX25_USB_HS_BASE_ADDR (MX25_USB_BASE_ADDR + 0x0400) #define MX25_CSI_BASE_ADDR 0x53ff8000 #define MX25_IO_P2V(x) IMX_IO_P2V(x) |
