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author | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2012-01-16 10:34:31 +0100 |
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committer | Uwe Kleine-König <u.kleine-koenig@pengutronix.de> | 2013-01-31 21:44:45 +0100 |
commit | b849a60e0903b1c5430c3859864554662e127a8d (patch) | |
tree | fe441d30362531fa204b52661a3d20a7f836fb19 /arch/arm/mm | |
parent | 949db153b6466c6f7cad5a427ecea94985927311 (diff) | |
download | blackbird-op-linux-b849a60e0903b1c5430c3859864554662e127a8d.tar.gz blackbird-op-linux-b849a60e0903b1c5430c3859864554662e127a8d.zip |
ARM: make cr_alignment read-only #ifndef CONFIG_CPU_CP15
This makes cr_alignment a constant 0 to break code that tries to modify
the value as it's likely that it's built on wrong assumption when
CONFIG_CPU_CP15 isn't defined. For code that is only reading the value 0
is more or less a fine value to report.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Message-Id: 1358413196-5609-2-git-send-email-u.kleine-koenig@pengutronix.de (v8)
Diffstat (limited to 'arch/arm/mm')
-rw-r--r-- | arch/arm/mm/alignment.c | 2 | ||||
-rw-r--r-- | arch/arm/mm/mmu.c | 17 |
2 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index b820edaf3184..feeb3eaccb1c 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c @@ -964,12 +964,14 @@ static int __init alignment_init(void) return -ENOMEM; #endif +#ifdef CONFIG_CPU_CP15 if (cpu_is_v6_unaligned()) { cr_alignment &= ~CR_A; cr_no_alignment &= ~CR_A; set_cr(cr_alignment); ai_usermode = safe_usermode(ai_usermode, false); } +#endif hook_fault_code(FAULT_CODE_ALIGNMENT, do_alignment, SIGBUS, BUS_ADRALN, "alignment exception"); diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index ce328c7f5c94..7c347bcc9421 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -97,6 +97,7 @@ static struct cachepolicy cache_policies[] __initdata = { } }; +#ifdef CONFIG_CPU_CP15 /* * These are useful for identifying cache coherency * problems by allowing the cache or the cache and @@ -195,6 +196,22 @@ void adjust_cr(unsigned long mask, unsigned long set) } #endif +#else /* ifdef CONFIG_CPU_CP15 */ + +static int __init early_cachepolicy(char *p) +{ + pr_warning("cachepolicy kernel parameter not supported without cp15\n"); +} +early_param("cachepolicy", early_cachepolicy); + +static int __init noalign_setup(char *__unused) +{ + pr_warning("noalign kernel parameter not supported without cp15\n"); +} +__setup("noalign", noalign_setup); + +#endif /* ifdef CONFIG_CPU_CP15 / else */ + #define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_XN #define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_AP_WRITE |