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authorRobert Richter <robert.richter@amd.com>2009-06-10 21:47:10 +0200
committerRobert Richter <robert.richter@amd.com>2009-06-10 21:47:10 +0200
commit0886751c5d8b19fcee2e65d34ae21c9111e652a9 (patch)
tree015e8c2b3d44d46e9e8fccd016340c51bc876d3b /arch/arm/mm/flush.c
parent7e4e0bd50e80df2fe5501f48f872448376cdd997 (diff)
parent07a2039b8eb0af4ff464efd3dfd95de5c02648c6 (diff)
downloadblackbird-op-linux-0886751c5d8b19fcee2e65d34ae21c9111e652a9.tar.gz
blackbird-op-linux-0886751c5d8b19fcee2e65d34ae21c9111e652a9.zip
Merge commit 'v2.6.30' into oprofile/master
Diffstat (limited to 'arch/arm/mm/flush.c')
-rw-r--r--arch/arm/mm/flush.c23
1 files changed, 21 insertions, 2 deletions
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c
index 4e283481cee1..c07222eb5ce0 100644
--- a/arch/arm/mm/flush.c
+++ b/arch/arm/mm/flush.c
@@ -18,6 +18,10 @@
#include "mm.h"
+#ifdef CONFIG_ARM_ERRATA_411920
+extern void v6_icache_inval_all(void);
+#endif
+
#ifdef CONFIG_CPU_CACHE_VIPT
#define ALIAS_FLUSH_START 0xffff4000
@@ -32,10 +36,15 @@ static void flush_pfn_alias(unsigned long pfn, unsigned long vaddr)
asm( "mcrr p15, 0, %1, %0, c14\n"
" mcr p15, 0, %2, c7, c10, 4\n"
+#ifndef CONFIG_ARM_ERRATA_411920
" mcr p15, 0, %2, c7, c5, 0\n"
+#endif
:
: "r" (to), "r" (to + PAGE_SIZE - L1_CACHE_BYTES), "r" (zero)
: "cc");
+#ifdef CONFIG_ARM_ERRATA_411920
+ v6_icache_inval_all();
+#endif
}
void flush_cache_mm(struct mm_struct *mm)
@@ -48,11 +57,16 @@ void flush_cache_mm(struct mm_struct *mm)
if (cache_is_vipt_aliasing()) {
asm( "mcr p15, 0, %0, c7, c14, 0\n"
+ " mcr p15, 0, %0, c7, c10, 4\n"
+#ifndef CONFIG_ARM_ERRATA_411920
" mcr p15, 0, %0, c7, c5, 0\n"
- " mcr p15, 0, %0, c7, c10, 4"
+#endif
:
: "r" (0)
: "cc");
+#ifdef CONFIG_ARM_ERRATA_411920
+ v6_icache_inval_all();
+#endif
}
}
@@ -67,11 +81,16 @@ void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned
if (cache_is_vipt_aliasing()) {
asm( "mcr p15, 0, %0, c7, c14, 0\n"
+ " mcr p15, 0, %0, c7, c10, 4\n"
+#ifndef CONFIG_ARM_ERRATA_411920
" mcr p15, 0, %0, c7, c5, 0\n"
- " mcr p15, 0, %0, c7, c10, 4"
+#endif
:
: "r" (0)
: "cc");
+#ifdef CONFIG_ARM_ERRATA_411920
+ v6_icache_inval_all();
+#endif
}
}
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