summaryrefslogtreecommitdiffstats
path: root/arch/arm/mm/dump.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2014-04-11 11:56:40 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2014-04-11 11:56:40 -0700
commitede1d63fccb7a397832ddbdee5951ec65194d93e (patch)
treec9cda036db9a4bc125cb27b282899500e6e8cf9e /arch/arm/mm/dump.c
parentb42e6dc66bf379d7d44d419dda8733c890838751 (diff)
parent98f07013149d4be18ff16cfc5b43218f3a70afd6 (diff)
downloadblackbird-op-linux-ede1d63fccb7a397832ddbdee5951ec65194d93e.tar.gz
blackbird-op-linux-ede1d63fccb7a397832ddbdee5951ec65194d93e.zip
Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm
Pull second set of ARM changes from Russell King: "This is the remainder of the ARM changes for this merge window. Included in this request are: - fixes for kprobes for big-endian support - fix tracing in soft_restart - avoid phys address overflow in kdump code - fix reporting of read-only pmd bits in kernel page table dump - remove unnecessary (and possibly buggy) call to outer_flush_all() - fix a three sparse warnings (missing header file for function prototypes) - fix pj4 crashing single zImage (thanks to arm-soc merging changes which enables this with knowledge that the corresponding fix had not even been submitted for my tree before the merge window opened) - vfp macro cleanups - dump register state on undefined instruction userspace faults when debugging" * 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: Dump the registers on undefined instruction userspace faults ARM: 8018/1: Add {inc,dec}_preempt_count asm macros ARM: 8017/1: Move asm macro get_thread_info to asm/assembler.h ARM: 8016/1: Check cpu id in pj4_cp0_init. ARM: 8015/1: Add cpu_is_pj4 to distinguish PJ4 because it has some differences with V7 ARM: add missing system_misc.h include to process.c ARM: 8009/1: dcscb.c: remove call to outer_flush_all() ARM: 8014/1: mm: fix reporting of read-only PMD bits ARM: 8012/1: kdump: Avoid overflow when converting pfn to physaddr ARM: 8010/1: avoid tracers in soft_restart ARM: kprobes-test: Workaround GAS .align bug ARM: kprobes-test: use <asm/opcodes.h> for Thumb instruction building ARM: kprobes-test: use <asm/opcodes.h> for ARM instruction building ARM: kprobes-test: use <asm/opcodes.h> for instruction accesses ARM: probes: fix instruction fetch order with <asm/opcodes.h>
Diffstat (limited to 'arch/arm/mm/dump.c')
-rw-r--r--arch/arm/mm/dump.c47
1 files changed, 32 insertions, 15 deletions
diff --git a/arch/arm/mm/dump.c b/arch/arm/mm/dump.c
index ef69152f9b52..c508f41a43bc 100644
--- a/arch/arm/mm/dump.c
+++ b/arch/arm/mm/dump.c
@@ -120,34 +120,51 @@ static const struct prot_bits pte_bits[] = {
};
static const struct prot_bits section_bits[] = {
-#ifndef CONFIG_ARM_LPAE
- /* These are approximate */
+#ifdef CONFIG_ARM_LPAE
+ {
+ .mask = PMD_SECT_USER,
+ .val = PMD_SECT_USER,
+ .set = "USR",
+ }, {
+ .mask = PMD_SECT_RDONLY,
+ .val = PMD_SECT_RDONLY,
+ .set = "ro",
+ .clear = "RW",
+#elif __LINUX_ARM_ARCH__ >= 6
{
- .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
- .val = 0,
+ .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+ .val = PMD_SECT_APX | PMD_SECT_AP_WRITE,
.set = " ro",
}, {
- .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+ .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
.val = PMD_SECT_AP_WRITE,
.set = " RW",
}, {
- .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+ .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
.val = PMD_SECT_AP_READ,
.set = "USR ro",
}, {
- .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+ .mask = PMD_SECT_APX | PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
.val = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
.set = "USR RW",
-#else
+#else /* ARMv4/ARMv5 */
+ /* These are approximate */
{
- .mask = PMD_SECT_USER,
- .val = PMD_SECT_USER,
- .set = "USR",
+ .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+ .val = 0,
+ .set = " ro",
}, {
- .mask = PMD_SECT_RDONLY,
- .val = PMD_SECT_RDONLY,
- .set = "ro",
- .clear = "RW",
+ .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+ .val = PMD_SECT_AP_WRITE,
+ .set = " RW",
+ }, {
+ .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+ .val = PMD_SECT_AP_READ,
+ .set = "USR ro",
+ }, {
+ .mask = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+ .val = PMD_SECT_AP_READ | PMD_SECT_AP_WRITE,
+ .set = "USR RW",
#endif
}, {
.mask = PMD_SECT_XN,
OpenPOWER on IntegriCloud