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authorKirill A. Shutemov <kirill@shutemov.name>2009-09-15 10:23:53 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-09-15 22:06:38 +0100
commit910a17e57ab6cd22b300bde4ce5f633f175c7ccd (patch)
tree2a1dea95ca2d50192216500d90d9b0358af1dc1d /arch/arm/mm/copypage-fa.c
parent59fcf48fdebe65e4774d2c7ec76b7845d281749a (diff)
downloadblackbird-op-linux-910a17e57ab6cd22b300bde4ce5f633f175c7ccd.tar.gz
blackbird-op-linux-910a17e57ab6cd22b300bde4ce5f633f175c7ccd.zip
ARM: 5700/1: ARM: Introduce ARM_L1_CACHE_SHIFT to define cache line size
Currently kernel believes that all ARM CPUs have L1_CACHE_SHIFT == 5. It's not true at least for CPUs based on Cortex-A8. List of CPUs with cache line size != 32 should be expanded later. Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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