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author | Andrew Lunn <andrew@lunn.ch> | 2014-02-22 20:14:52 +0100 |
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committer | Jason Cooper <jason@lakedaemon.net> | 2014-02-22 20:43:49 +0000 |
commit | 4b8f7a11c9fb680895e5079788653a59d6bdde16 (patch) | |
tree | d20f78bd55eb043f8f9e1be5e702301263b73079 /arch/arm/mm/cache-feroceon-l2.c | |
parent | 3c317d00ba4a9489c161857a574432c61fde4a2a (diff) | |
download | blackbird-op-linux-4b8f7a11c9fb680895e5079788653a59d6bdde16.tar.gz blackbird-op-linux-4b8f7a11c9fb680895e5079788653a59d6bdde16.zip |
ARM: MM: Add DT binding for Feroceon L2 cache
Instantiate the L2 cache from DT. Indicate in DT where the cache
control register is so that it is possible to enable/disable write
through on the CPU.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mm/cache-feroceon-l2.c')
-rw-r--r-- | arch/arm/mm/cache-feroceon-l2.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c index 898362e7972b..8dc1a2b5a8ed 100644 --- a/arch/arm/mm/cache-feroceon-l2.c +++ b/arch/arm/mm/cache-feroceon-l2.c @@ -13,11 +13,16 @@ */ #include <linux/init.h> +#include <linux/of.h> +#include <linux/of_address.h> #include <linux/highmem.h> +#include <linux/io.h> #include <asm/cacheflush.h> #include <asm/cp15.h> #include <asm/hardware/cache-feroceon-l2.h> +#define L2_WRITETHROUGH_KIRKWOOD BIT(4) + /* * Low-level cache maintenance operations. * @@ -350,3 +355,41 @@ void __init feroceon_l2_init(int __l2_wt_override) printk(KERN_INFO "Feroceon L2: Cache support initialised%s.\n", l2_wt_override ? ", in WT override mode" : ""); } +#ifdef CONFIG_OF +static const struct of_device_id feroceon_ids[] __initconst = { + { .compatible = "marvell,kirkwood-cache"}, + { .compatible = "marvell,feroceon-cache"}, + {} +}; + +int __init feroceon_of_init(void) +{ + struct device_node *node; + void __iomem *base; + bool l2_wt_override = false; + struct resource res; + +#if defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH) + l2_wt_override = true; +#endif + + node = of_find_matching_node(NULL, feroceon_ids); + if (node && of_device_is_compatible(node, "marvell,kirkwood-cache")) { + if (of_address_to_resource(node, 0, &res)) + return -ENODEV; + + base = ioremap(res.start, resource_size(&res)); + if (!base) + return -ENOMEM; + + if (l2_wt_override) + writel(readl(base) | L2_WRITETHROUGH_KIRKWOOD, base); + else + writel(readl(base) & ~L2_WRITETHROUGH_KIRKWOOD, base); + } + + feroceon_l2_init(l2_wt_override); + + return 0; +} +#endif |