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| author | Will Deacon <will.deacon@arm.com> | 2011-02-28 17:01:04 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-03-20 09:32:21 +0000 |
| commit | 80b5efbd43f0a21e9fc6db87823be32fcfe3e7ce (patch) | |
| tree | 12a213968fa7c0bac41ff539f82ba64f0e979c4c /arch/arm/mach-vexpress/include | |
| parent | 196f020fbbb83d246960548e73a40fd08f3e7866 (diff) | |
| download | blackbird-op-linux-80b5efbd43f0a21e9fc6db87823be32fcfe3e7ce.tar.gz blackbird-op-linux-80b5efbd43f0a21e9fc6db87823be32fcfe3e7ce.zip | |
ARM: 6771/1: vexpress: add support for multiple core tiles
The current Versatile Express BSP defines the MACHINE_START macro
in the core tile code.
This patch moves this into the generic board code and introduces a
method for determining the current tile at runtime, allowing the
Kernel to have support for multiple tiles compiled in. Tile-specific
functions are executed via a descriptor struct containing the correct
implementations for the current tile.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-vexpress/include')
| -rw-r--r-- | arch/arm/mach-vexpress/include/mach/ct-ca9x4.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-vexpress/include/mach/motherboard.h | 22 |
2 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h index f9e2f8d22962..a34d3d4faae1 100644 --- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h +++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h @@ -45,4 +45,6 @@ #define IRQ_CT_CA9X4_PMU_CPU2 94 #define IRQ_CT_CA9X4_PMU_CPU3 95 +extern struct ct_desc ct_ca9x4_desc; + #endif diff --git a/arch/arm/mach-vexpress/include/mach/motherboard.h b/arch/arm/mach-vexpress/include/mach/motherboard.h index 98a8ded055bf..0a3a37518405 100644 --- a/arch/arm/mach-vexpress/include/mach/motherboard.h +++ b/arch/arm/mach-vexpress/include/mach/motherboard.h @@ -118,4 +118,26 @@ int v2m_cfg_write(u32 devfn, u32 data); int v2m_cfg_read(u32 devfn, u32 *data); +/* + * Core tile IDs + */ +#define V2M_CT_ID_CA9 0x0c000191 +#define V2M_CT_ID_UNSUPPORTED 0xff000191 +#define V2M_CT_ID_MASK 0xff000fff + +struct ct_desc { + u32 id; + const char *name; + void (*map_io)(void); + void (*init_early)(void); + void (*init_irq)(void); + void (*init_tile)(void); +#ifdef CONFIG_SMP + void (*init_cpu_map)(void); + void (*smp_enable)(unsigned int); +#endif +}; + +extern struct ct_desc *ct_desc; + #endif |
