diff options
author | Colin Cross <ccross@android.com> | 2011-02-21 16:44:07 -0800 |
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committer | Colin Cross <ccross@android.com> | 2011-02-22 11:25:07 -0800 |
commit | 1be3d0537516fa42825406b4bc1291b77ed62614 (patch) | |
tree | 4ade740dd278fd5e213bad3774f0df3721f6110c /arch/arm/mach-tegra | |
parent | 421186e71000c067c2687baeffde62954a80cdcc (diff) | |
download | blackbird-op-linux-1be3d0537516fa42825406b4bc1291b77ed62614.tar.gz blackbird-op-linux-1be3d0537516fa42825406b4bc1291b77ed62614.zip |
ARM: tegra: clock: prevent accidental disables of cpu clock
Peripheral clocks that have no clock enable bit in the
enable registers have their clk_num set to 0. Bit 0
in the clock enable registers is the CPU clock.
Prevent disables on these peripheral clocks from
accidentally disabling the CPU clock.
Signed-off-by: Colin Cross <ccross@android.com>
Acked-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra')
-rw-r--r-- | arch/arm/mach-tegra/tegra2_clocks.c | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/tegra2_clocks.c b/arch/arm/mach-tegra/tegra2_clocks.c index 73e112f12695..3015a2c64252 100644 --- a/arch/arm/mach-tegra/tegra2_clocks.c +++ b/arch/arm/mach-tegra/tegra2_clocks.c @@ -946,9 +946,14 @@ static void tegra2_periph_clk_init(struct clk *c) } c->state = ON; + + if (!c->u.periph.clk_num) + return; + if (!(clk_readl(CLK_OUT_ENB + PERIPH_CLK_TO_ENB_REG(c)) & PERIPH_CLK_TO_ENB_BIT(c))) c->state = OFF; + if (!(c->flags & PERIPH_NO_RESET)) if (clk_readl(RST_DEVICES + PERIPH_CLK_TO_ENB_REG(c)) & PERIPH_CLK_TO_ENB_BIT(c)) @@ -962,6 +967,9 @@ static int tegra2_periph_clk_enable(struct clk *c) int refcount; pr_debug("%s on clock %s\n", __func__, c->name); + if (!c->u.periph.clk_num) + return 0; + spin_lock_irqsave(&clock_register_lock, flags); refcount = tegra_periph_clk_enable_refcount[c->u.periph.clk_num]++; @@ -994,6 +1002,9 @@ static void tegra2_periph_clk_disable(struct clk *c) pr_debug("%s on clock %s\n", __func__, c->name); + if (!c->u.periph.clk_num) + return; + spin_lock_irqsave(&clock_register_lock, flags); if (c->refcnt) @@ -1012,6 +1023,9 @@ static void tegra2_periph_clk_reset(struct clk *c, bool assert) pr_debug("%s %s on clock %s\n", __func__, assert ? "assert" : "deassert", c->name); + + BUG_ON(!c->u.periph.clk_num); + if (!(c->flags & PERIPH_NO_RESET)) clk_writel(PERIPH_CLK_TO_ENB_BIT(c), base + PERIPH_CLK_TO_ENB_SET_REG(c)); @@ -1182,6 +1196,10 @@ static void tegra2_clk_double_init(struct clk *c) c->mul = 2; c->div = 1; c->state = ON; + + if (!c->u.periph.clk_num) + return; + if (!(clk_readl(CLK_OUT_ENB + PERIPH_CLK_TO_ENB_REG(c)) & PERIPH_CLK_TO_ENB_BIT(c))) c->state = OFF; @@ -1269,6 +1287,9 @@ static void tegra2_cdev_clk_init(struct clk *c) /* We could un-tristate the cdev1 or cdev2 pingroup here; this is * currently done in the pinmux code. */ c->state = ON; + + BUG_ON(!c->u.periph.clk_num); + if (!(clk_readl(CLK_OUT_ENB + PERIPH_CLK_TO_ENB_REG(c)) & PERIPH_CLK_TO_ENB_BIT(c))) c->state = OFF; @@ -1276,6 +1297,8 @@ static void tegra2_cdev_clk_init(struct clk *c) static int tegra2_cdev_clk_enable(struct clk *c) { + BUG_ON(!c->u.periph.clk_num); + clk_writel(PERIPH_CLK_TO_ENB_BIT(c), CLK_OUT_ENB_SET + PERIPH_CLK_TO_ENB_SET_REG(c)); return 0; @@ -1283,6 +1306,8 @@ static int tegra2_cdev_clk_enable(struct clk *c) static void tegra2_cdev_clk_disable(struct clk *c) { + BUG_ON(!c->u.periph.clk_num); + clk_writel(PERIPH_CLK_TO_ENB_BIT(c), CLK_OUT_ENB_CLR + PERIPH_CLK_TO_ENB_SET_REG(c)); } |