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| author | Prashant Gaikwad <pgaikwad@nvidia.com> | 2012-08-06 11:57:43 +0530 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2012-09-06 11:47:20 -0600 |
| commit | 92fe58f07f6e51185497785aed632d0e676afe6e (patch) | |
| tree | 3791468579de25fa4ada69abacdaf9666a8b7657 /arch/arm/mach-tegra/tegra30_clocks.h | |
| parent | 96a1bd1e11ade7be969d275edd4c06749684cdba (diff) | |
| download | blackbird-op-linux-92fe58f07f6e51185497785aed632d0e676afe6e.tar.gz blackbird-op-linux-92fe58f07f6e51185497785aed632d0e676afe6e.zip | |
ARM: tegra: Port tegra to generic clock framework
This patch converts tegra clock code to generic clock framework in following way:
- Implement clk_ops as required by generic clk framework. (tegraXX_clocks.c)
- Use platform specific struct clk_tegra in clk_ops implementation instead of struct clk.
- Initialize all clock data statically. (tegraXX_clocks_data.c)
Legacy framework did not have recalc_rate and is_enabled functions. Implemented these functions.
Removed init function. It's functionality is splitted into recalc_rate and is_enabled.
Static initialization is used since slab is not up in .init_early and clock
is needed to be initialized before clockevent/clocksource initialization.
Macros redefined for clk_tegra.
Also, single struct clk_tegra is used for all type of clocks (PLL, peripheral etc.). This
is to move quickly to generic common clock framework so that other dependent features will
not be blocked (such as DT binding).
Enabling COMMON_CLOCK config moved to ARCH_TEGRA since it is enabled for both Tegra20
and Tegra30.
Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/tegra30_clocks.h')
| -rw-r--r-- | arch/arm/mach-tegra/tegra30_clocks.h | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/tegra30_clocks.h b/arch/arm/mach-tegra/tegra30_clocks.h index f8c4df5f53f7..aeb4e963f632 100644 --- a/arch/arm/mach-tegra/tegra30_clocks.h +++ b/arch/arm/mach-tegra/tegra30_clocks.h @@ -17,6 +17,7 @@ #ifndef __MACH_TEGRA30_CLOCK_H #define __MACH_TEGRA30_CLOCK_H +extern struct clk_ops tegra_clk_32k_ops; extern struct clk_ops tegra30_clk_m_ops; extern struct clk_ops tegra_clk_m_div_ops; extern struct clk_ops tegra_pll_ref_ops; @@ -27,17 +28,26 @@ extern struct clk_ops tegra30_plle_ops; extern struct clk_ops tegra_cml_clk_ops; extern struct clk_ops tegra_pciex_clk_ops; extern struct clk_ops tegra_sync_source_ops; -extern struct clk_ops tegra30_audio_sync_clk_ops; +extern struct clk_ops tegra_audio_sync_clk_ops; extern struct clk_ops tegra30_clk_double_ops; extern struct clk_ops tegra_clk_out_ops; extern struct clk_ops tegra30_super_ops; extern struct clk_ops tegra30_blink_clk_ops; extern struct clk_ops tegra30_twd_ops; extern struct clk_ops tegra30_periph_clk_ops; -extern struct clk_ops tegra_dsib_clk_ops; +extern struct clk_ops tegra30_dsib_clk_ops; extern struct clk_ops tegra_nand_clk_ops; extern struct clk_ops tegra_vi_clk_ops; extern struct clk_ops tegra_dtv_clk_ops; extern struct clk_ops tegra_clk_shared_bus_ops; +int tegra30_plld_clk_cfg_ex(struct clk_hw *hw, + enum tegra_clk_ex_param p, u32 setting); +void tegra30_periph_clk_reset(struct clk_hw *hw, bool assert); +int tegra30_vi_clk_cfg_ex(struct clk_hw *hw, + enum tegra_clk_ex_param p, u32 setting); +int tegra30_nand_clk_cfg_ex(struct clk_hw *hw, + enum tegra_clk_ex_param p, u32 setting); +int tegra30_dtv_clk_cfg_ex(struct clk_hw *hw, + enum tegra_clk_ex_param p, u32 setting); #endif |
