diff options
| author | Joseph Lo <josephl@nvidia.com> | 2013-07-03 17:50:38 +0800 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-07-19 10:08:05 -0600 |
| commit | ac2527bfc21739b77d687df1bfc4e973103fef7b (patch) | |
| tree | e217d872db97681d551caf07f38129a8f3fa473f /arch/arm/mach-tegra/sleep-tegra30.S | |
| parent | c04c77540a4f996ee94d0240bbae3a7512febd37 (diff) | |
| download | blackbird-op-linux-ac2527bfc21739b77d687df1bfc4e973103fef7b.tar.gz blackbird-op-linux-ac2527bfc21739b77d687df1bfc4e973103fef7b.zip | |
ARM: tegra: add a flag for tegra_disable_clean_inv_dcache to do LoUIS or ALL
Adding a flag for tegra_disable_clean_inv_dcache to flush cache as LoUIS
or ALL. After this patch, the v7_flush_dcache_louis is used for CPU hotplug
and CPU suspend in CPU power down (e.g. CPU idle power-down mode) case. And
the v7_flush_dcache_all is used for CPU cluster power down (e.g. suspend to
LP2 mode).
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/sleep-tegra30.S')
| -rw-r--r-- | arch/arm/mach-tegra/sleep-tegra30.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index 5877f268fa97..6744161475b2 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -137,6 +137,7 @@ ENTRY(tegra30_sleep_cpu_secondary_finish) mov r7, lr /* Flush and disable the L1 data cache */ + mov r0, #TEGRA_FLUSH_CACHE_LOUIS bl tegra_disable_clean_inv_dcache /* Powergate this CPU. */ |
