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author | Olof Johansson <olof@lixom.net> | 2012-03-27 17:19:15 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2012-03-27 17:19:15 -0700 |
commit | b521d929b330d665cb3a42b26eaaa5690dc9dad7 (patch) | |
tree | 7c1ddf1c06922c4728b6625fb10cf11de5a29387 /arch/arm/mach-tegra/include/mach | |
parent | 83b5938ce77bbbd9a04e5270ef2b3f17921bf0d4 (diff) | |
parent | d405e4b07a15b9d24d504a459295cf00a618c10c (diff) | |
download | blackbird-op-linux-b521d929b330d665cb3a42b26eaaa5690dc9dad7.tar.gz blackbird-op-linux-b521d929b330d665cb3a42b26eaaa5690dc9dad7.zip |
Merge branch 'tegra/soc' into next/cleanup2
Conflicts:
arch/arm/mach-tegra/Makefile
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-tegra/include/mach')
-rw-r--r-- | arch/arm/mach-tegra/include/mach/clk.h | 10 | ||||
-rw-r--r-- | arch/arm/mach-tegra/include/mach/iomap.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-tegra/include/mach/irqs.h | 7 |
3 files changed, 17 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/include/mach/clk.h b/arch/arm/mach-tegra/include/mach/clk.h index fc3ecb66de08..d97e403303a0 100644 --- a/arch/arm/mach-tegra/include/mach/clk.h +++ b/arch/arm/mach-tegra/include/mach/clk.h @@ -22,10 +22,20 @@ struct clk; +enum tegra_clk_ex_param { + TEGRA_CLK_VI_INP_SEL, + TEGRA_CLK_DTV_INVERT, + TEGRA_CLK_NAND_PAD_DIV2_ENB, + TEGRA_CLK_PLLD_CSI_OUT_ENB, + TEGRA_CLK_PLLD_DSI_OUT_ENB, + TEGRA_CLK_PLLD_MIPI_MUX_SEL, +}; + void tegra_periph_reset_deassert(struct clk *c); void tegra_periph_reset_assert(struct clk *c); unsigned long clk_get_rate_all_locked(struct clk *c); void tegra2_sdmmc_tap_delay(struct clk *c, int delay); +int tegra_clk_cfg_ex(struct clk *c, enum tegra_clk_ex_param p, u32 setting); #endif diff --git a/arch/arm/mach-tegra/include/mach/iomap.h b/arch/arm/mach-tegra/include/mach/iomap.h index c05b311ee4f7..2fd947259132 100644 --- a/arch/arm/mach-tegra/include/mach/iomap.h +++ b/arch/arm/mach-tegra/include/mach/iomap.h @@ -74,6 +74,9 @@ #define TEGRA_QUATERNARY_ICTLR_BASE 0x60004300 #define TEGRA_QUATERNARY_ICTLR_SIZE SZ_64 +#define TEGRA_QUINARY_ICTLR_BASE 0x60004400 +#define TEGRA_QUINARY_ICTLR_SIZE SZ_64 + #define TEGRA_TMR1_BASE 0x60005000 #define TEGRA_TMR1_SIZE SZ_8 diff --git a/arch/arm/mach-tegra/include/mach/irqs.h b/arch/arm/mach-tegra/include/mach/irqs.h index a2146cd6867d..aad1a2c1d714 100644 --- a/arch/arm/mach-tegra/include/mach/irqs.h +++ b/arch/arm/mach-tegra/include/mach/irqs.h @@ -165,11 +165,12 @@ #define INT_QUAD_RES_30 (INT_QUAD_BASE + 30) #define INT_QUAD_RES_31 (INT_QUAD_BASE + 31) -#define INT_MAIN_NR (INT_QUAD_BASE + 32 - INT_PRI_BASE) - +/* Tegra30 has 5 banks of 32 IRQs */ +#define INT_MAIN_NR (32 * 5) #define INT_GPIO_BASE (INT_PRI_BASE + INT_MAIN_NR) -#define INT_GPIO_NR (28 * 8) +/* Tegra30 has 8 banks of 32 GPIOs */ +#define INT_GPIO_NR (32 * 8) #define TEGRA_NR_IRQS (INT_GPIO_BASE + INT_GPIO_NR) |