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| author | Marc Zyngier <marc.zyngier@arm.com> | 2011-09-06 10:23:45 +0100 |
|---|---|---|
| committer | Marc Zyngier <marc.zyngier@arm.com> | 2011-11-15 18:14:00 +0000 |
| commit | afed2a261825e83cf9564dec60961e8aba6dc701 (patch) | |
| tree | d1e48618dd82f5d78f4a58d6c4f90b879153a4aa /arch/arm/mach-tegra/include/mach/entry-macro.S | |
| parent | 4e44d2cb95bd93abe16a131dbcd4c052ae36665f (diff) | |
| download | blackbird-op-linux-afed2a261825e83cf9564dec60961e8aba6dc701.tar.gz blackbird-op-linux-afed2a261825e83cf9564dec60961e8aba6dc701.zip | |
ARM: tegra2: convert to CONFIG_MULTI_IRQ_HANDLER
Convert the tegra2 platforms to be using the gic_handle_irq
function as their primary interrupt handler.
Tested on harmony.
Cc: Colin Cross <ccross@android.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'arch/arm/mach-tegra/include/mach/entry-macro.S')
| -rw-r--r-- | arch/arm/mach-tegra/include/mach/entry-macro.S | 22 |
1 files changed, 2 insertions, 20 deletions
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S index dd165c53889d..ac11262149c7 100644 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ b/arch/arm/mach-tegra/include/mach/entry-macro.S @@ -12,30 +12,15 @@ * GNU General Public License for more details. * */ -#include <mach/iomap.h> -#include <mach/io.h> - -#if defined(CONFIG_ARM_GIC) -#define HAVE_GET_IRQNR_PREAMBLE -#include <asm/hardware/entry-macro-gic.S> - - /* Uses the GIC interrupt controller built into the cpu */ -#define ICTRL_BASE (IO_CPU_VIRT + 0x100) .macro disable_fiq .endm - .macro get_irqnr_preamble, base, tmp - movw \base, #(ICTRL_BASE & 0x0000ffff) - movt \base, #((ICTRL_BASE & 0xffff0000) >> 16) + .macro arch_ret_to_user, tmp1, tmp2 .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm -#else +#if !defined(CONFIG_ARM_GIC) /* legacy interrupt controller for AP16 */ - .macro disable_fiq - .endm .macro get_irqnr_preamble, base, tmp @ enable imprecise aborts @@ -46,9 +31,6 @@ orr \base, #0x0000f000 .endm - .macro arch_ret_to_user, tmp1, tmp2 - .endm - .macro get_irqnr_and_base, irqnr, irqstat, base, tmp ldr \irqnr, [\base, #0x20] @ EVT_IRQ_STS cmp \irqnr, #0x80 |
