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authorColin Cross <ccross@android.com>2011-01-22 00:36:14 -0800
committerColin Cross <ccross@android.com>2011-02-10 17:50:43 -0800
commit535371c3fba22b414dbbe25b93fbddbd471c772a (patch)
tree57562627f934bce6326d4bb18462ebed98fcead4 /arch/arm/mach-tegra/common.c
parentf2b6133ffc05cdfd12ac41cda5eb5d8e55990365 (diff)
downloadblackbird-op-linux-535371c3fba22b414dbbe25b93fbddbd471c772a.tar.gz
blackbird-op-linux-535371c3fba22b414dbbe25b93fbddbd471c772a.zip
ARM: tegra: Use writel_relaxed in tegra_init_cache
Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm/mach-tegra/common.c')
-rw-r--r--arch/arm/mach-tegra/common.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c
index 84a7197e1eff..34559d157827 100644
--- a/arch/arm/mach-tegra/common.c
+++ b/arch/arm/mach-tegra/common.c
@@ -63,8 +63,8 @@ void __init tegra_init_cache(void)
#ifdef CONFIG_CACHE_L2X0
void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
- writel(0x331, p + L2X0_TAG_LATENCY_CTRL);
- writel(0x441, p + L2X0_DATA_LATENCY_CTRL);
+ writel_relaxed(0x331, p + L2X0_TAG_LATENCY_CTRL);
+ writel_relaxed(0x441, p + L2X0_DATA_LATENCY_CTRL);
l2x0_init(p, 0x6C080001, 0x8200c3fe);
#endif
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