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authordmitry pervushin <dpervushin@embeddedalley.com>2009-04-22 23:54:05 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-04-27 10:28:06 +0100
commit34acb09025a132943555d0f0ffca6cb05c698cd4 (patch)
tree339c18b51f89cda84c79f851a08e928da0145b03 /arch/arm/mach-stmp37xx/include/mach/regs-icoll.h
parent1e3dd535d641a856e913dd8a17a75bd3c36c49e0 (diff)
downloadblackbird-op-linux-34acb09025a132943555d0f0ffca6cb05c698cd4.tar.gz
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[ARM] 5468/1: Freescale STMP platform support [3/10]
Minimal definition of register set for 37xx boards Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-stmp37xx/include/mach/regs-icoll.h')
-rw-r--r--arch/arm/mach-stmp37xx/include/mach/regs-icoll.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/mach-stmp37xx/include/mach/regs-icoll.h b/arch/arm/mach-stmp37xx/include/mach/regs-icoll.h
new file mode 100644
index 000000000000..8a92f923f6bd
--- /dev/null
+++ b/arch/arm/mach-stmp37xx/include/mach/regs-icoll.h
@@ -0,0 +1,36 @@
+/*
+ * Freescale STMP378X: clock registers definitions
+ *
+ * Embedded Alley Solutions, Inc <source@embeddedalley.com>
+ *
+ * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
+ */
+
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+#ifndef _INCLUDE_ASM_ARCH_REGS_ICOLL_H
+#define _INCLUDE_ASM_ARCH_REGS_ICOLL_H
+
+
+#include <mach/stmp3xxx_regs.h>
+
+#define REGS_ICOLL_BASE (REGS_BASE + 0x00000000)
+
+HW_REGISTER(HW_ICOLL_VECTOR, REGS_ICOLL_BASE, 0x00)
+HW_REGISTER_WO(HW_ICOLL_LEVELACK, REGS_ICOLL_BASE, 0x10)
+HW_REGISTER(HW_ICOLL_CTRL, REGS_ICOLL_BASE, 0x20)
+#define BM_ICOLL_CTRL_CLKGATE 0x40000000
+#define BM_ICOLL_CTRL_SFTRST 0x80000000
+HW_REGISTER_RO(HW_ICOLL_STAT, REGS_ICOLL_BASE, 0x30)
+
+HW_REGISTER_INDEXED(HW_ICOLL_PRIORITYn, REGS_ICOLL_BASE, 0x60, 0x10)
+
+#endif /* _INCLUDE_ASM_ARCH_REGS_CLKCTRL_H */
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