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| author | Srinivas Kandagatla <srinivas.kandagatla@st.com> | 2013-06-25 12:15:10 +0100 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2013-06-25 13:26:47 -0700 |
| commit | 65ebcc1158891c8c0abef726d59a7840454ad25d (patch) | |
| tree | 9907cd1af2d7f679f2b6a5a1192b2ff5df7f11c9 /arch/arm/mach-sti/headsmp.S | |
| parent | 317ddd256b9c24b0d78fa8018f80f1e495481a10 (diff) | |
| download | blackbird-op-linux-65ebcc1158891c8c0abef726d59a7840454ad25d.tar.gz blackbird-op-linux-65ebcc1158891c8c0abef726d59a7840454ad25d.zip | |
ARM: sti: Add STiH415 SOC support
The STiH415 is the next generation of HD, AVC set-top box processors for
satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9
1.0 GHz, dual-core CPU.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
CC: Stephen Gallimore <stephen.gallimore@st.com>
CC: Stuart Menefy <stuart.menefy@st.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-sti/headsmp.S')
| -rw-r--r-- | arch/arm/mach-sti/headsmp.S | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/mach-sti/headsmp.S b/arch/arm/mach-sti/headsmp.S new file mode 100644 index 000000000000..78ebc7559f53 --- /dev/null +++ b/arch/arm/mach-sti/headsmp.S @@ -0,0 +1,44 @@ +/* + * arch/arm/mach-sti/headsmp.S + * + * Copyright (C) 2013 STMicroelectronics (R&D) Limited. + * http://www.st.com + * + * Cloned from linux/arch/arm/mach-vexpress/headsmp.S + * + * Copyright (c) 2003 ARM Limited + * All Rights Reserved + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#include <linux/linkage.h> +#include <linux/init.h> + + __INIT + +/* + * ST specific entry point for secondary CPUs. This provides + * a "holding pen" into which all secondary cores are held until we're + * ready for them to initialise. + */ +ENTRY(sti_secondary_startup) + mrc p15, 0, r0, c0, c0, 5 + and r0, r0, #15 + adr r4, 1f + ldmia r4, {r5, r6} + sub r4, r4, r5 + add r6, r6, r4 +pen: ldr r7, [r6] + cmp r7, r0 + bne pen + + /* + * we've been released from the holding pen: secondary_stack + * should now contain the SVC stack for this core + */ + b secondary_startup + +1: .long . + .long pen_release |
