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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-01-11 15:10:08 +1100 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-01-11 15:10:08 +1100 |
| commit | eed0ba0b4ab2d1668588219a8efa81bf8636a12d (patch) | |
| tree | f5aa3c732e7830a1b24e6071f8bed0f799881187 /arch/arm/mach-shmobile/include/mach/entry-macro.S | |
| parent | 98b14d6b290d96b24ae993ceaccc59b2aa4b130c (diff) | |
| parent | c9de9333f5a860cab82052bce6ac28bcac9b2c26 (diff) | |
| download | blackbird-op-linux-eed0ba0b4ab2d1668588219a8efa81bf8636a12d.tar.gz blackbird-op-linux-eed0ba0b4ab2d1668588219a8efa81bf8636a12d.zip | |
Merge remote branch 'gcl/next' into next
Diffstat (limited to 'arch/arm/mach-shmobile/include/mach/entry-macro.S')
| -rw-r--r-- | arch/arm/mach-shmobile/include/mach/entry-macro.S | 30 |
1 files changed, 26 insertions, 4 deletions
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S index a285d13c7416..f428c4db2b60 100644 --- a/arch/arm/mach-shmobile/include/mach/entry-macro.S +++ b/arch/arm/mach-shmobile/include/mach/entry-macro.S @@ -1,4 +1,5 @@ /* + * Copyright (C) 2010 Magnus Damm * Copyright (C) 2008 Renesas Solutions Corp. * * This program is free software; you can redistribute it and/or modify @@ -14,24 +15,45 @@ * along with this program; if not, write to the Free Software * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <mach/hardware.h> #include <mach/irqs.h> +#define INTCA_BASE 0xe6980000 +#define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */ +#define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */ +#define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */ +#define INTLVLB_OFFS 0x00000034 /* previous priority level */ + .macro disable_fiq .endm .macro get_irqnr_preamble, base, tmp - ldr \base, =INTFLGA + ldr \base, =INTCA_BASE .endm .macro arch_ret_to_user, tmp1, tmp2 .endm .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - ldr \irqnr, [\base] + /* The single INTFLGA read access below results in the following: + * + * 1. INTLVLB is updated with old priority value from INTLVLA + * 2. Highest priority interrupt is accepted + * 3. INTLVLA is updated to contain priority of accepted interrupt + * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA + */ + ldr \irqnr, [\base, #INTFLGA_OFFS] + + /* Restore INTLVLA with the value saved in INTLVLB. + * This is required to support interrupt priorities properly. + */ + ldrb \tmp, [\base, #INTLVLB_OFFS] + strb \tmp, [\base, #INTLVLA_OFFS] + + /* Handle invalid vector number case */ cmp \irqnr, #0 beq 1000f - /* intevt to irq number */ + + /* Convert vector to irq number, same as the evt2irq() macro */ lsr \irqnr, \irqnr, #0x5 subs \irqnr, \irqnr, #16 |
