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| author | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-05 13:25:15 +0000 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-01-05 13:25:27 +0000 |
| commit | 7b9dd47136c07ffd883aff6926c7b281e4c1eea4 (patch) | |
| tree | b835312e76fe323de3e1cbbb0d15fca5a3f7ef9c /arch/arm/mach-s5pv210/mach-torbreck.c | |
| parent | 2e0e943436912ffe0848ece58167edfe754edb96 (diff) | |
| parent | 0575fb754dbfc32a01f297e778533340a533ec68 (diff) | |
| download | blackbird-op-linux-7b9dd47136c07ffd883aff6926c7b281e4c1eea4.tar.gz blackbird-op-linux-7b9dd47136c07ffd883aff6926c7b281e4c1eea4.zip | |
Merge branch 'restart' into for-linus
Conflicts:
arch/arm/mach-exynos/cpu.c
The changes to arch/arm/mach-exynos/cpu.c were moved to
mach-exynos/common.c.
Diffstat (limited to 'arch/arm/mach-s5pv210/mach-torbreck.c')
| -rw-r--r-- | arch/arm/mach-s5pv210/mach-torbreck.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-s5pv210/mach-torbreck.c b/arch/arm/mach-s5pv210/mach-torbreck.c index df70fcb34516..74e99bc0dc9b 100644 --- a/arch/arm/mach-s5pv210/mach-torbreck.c +++ b/arch/arm/mach-s5pv210/mach-torbreck.c @@ -24,12 +24,13 @@ #include <mach/regs-clock.h> #include <plat/regs-serial.h> -#include <plat/s5pv210.h> #include <plat/devs.h> #include <plat/cpu.h> #include <plat/iic.h> #include <plat/s5p-time.h> +#include "common.h" + /* Following are default values for UCON, ULCON and UFCON UART registers */ #define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ S3C2410_UCON_RXILEVEL | \ @@ -103,7 +104,7 @@ static struct i2c_board_info torbreck_i2c_devs2[] __initdata = { static void __init torbreck_map_io(void) { - s5p_init_io(NULL, 0, S5P_VA_CHIPID); + s5pv210_init_io(NULL, 0); s3c24xx_init_clocks(24000000); s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs)); s5p_set_timer_source(S5P_PWM3, S5P_PWM4); @@ -132,4 +133,5 @@ MACHINE_START(TORBRECK, "TORBRECK") .map_io = torbreck_map_io, .init_machine = torbreck_machine_init, .timer = &s5p_timer, + .restart = s5pv210_restart, MACHINE_END |
