diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-08-08 11:14:29 -0700 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-08-08 11:14:29 -0700 |
commit | b3345d7c57d70e6cb6749af25cdbe80515582e99 (patch) | |
tree | 04cce706bc7e944ad1fb257108a8ae735948f97f /arch/arm/mach-s5pv210/include/mach/gpio-samsung.h | |
parent | 44c916d58b9ef1f2c4aec2def57fa8289c716a60 (diff) | |
parent | c2fff85e21818952aa0ee5778926beee6c03e579 (diff) | |
download | blackbird-op-linux-b3345d7c57d70e6cb6749af25cdbe80515582e99.tar.gz blackbird-op-linux-b3345d7c57d70e6cb6749af25cdbe80515582e99.zip |
Merge tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Olof Johansson:
"This is the bulk of new SoC enablement and other platform changes for
3.17:
- Samsung S5PV210 has been converted to DT and multiplatform
- Clock drivers and bindings for some of the lower-end i.MX 1/2
platforms
- Kirkwood, one of the popular Marvell platforms, is folded into the
mvebu platform code, removing mach-kirkwood
- Hwmod data for TI AM43xx and DRA7 platforms
- More additions of Renesas shmobile platform support
- Removal of plat-samsung contents that can be removed with S5PV210
being multiplatform/DT-enabled and the other two old platforms
being removed
New platforms (most with only basic support right now):
- Hisilicon X5HD2 settop box chipset is introduced
- Mediatek MT6589 (mobile chipset) is introduced
- Broadcom BCM7xxx settop box chipset is introduced
+ as usual a lot other pieces all over the platform code"
* tag 'soc-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (240 commits)
ARM: hisi: remove smp from machine descriptor
power: reset: move hisilicon reboot code
ARM: dts: Add hix5hd2-dkb dts file.
ARM: debug: Rename Hi3716 to HIX5HD2
ARM: hisi: enable hix5hd2 SoC
ARM: hisi: add ARCH_HISI
MAINTAINERS: add entry for Broadcom ARM STB architecture
ARM: brcmstb: select GISB arbiter and interrupt drivers
ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
ARM: configs: enable SMP in bcm_defconfig
ARM: add SMP support for Broadcom mobile SoCs
Documentation: arm: misc updates to Marvell EBU SoC status
Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC
ARM: mvebu: fix build without platforms selected
ARM: mvebu: add cpuidle support for Armada 38x
ARM: mvebu: add cpuidle support for Armada 370
cpuidle: mvebu: add Armada 38x support
cpuidle: mvebu: add Armada 370 support
cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7
ARM: mvebu: export the SCU address
...
Diffstat (limited to 'arch/arm/mach-s5pv210/include/mach/gpio-samsung.h')
-rw-r--r-- | arch/arm/mach-s5pv210/include/mach/gpio-samsung.h | 135 |
1 files changed, 0 insertions, 135 deletions
diff --git a/arch/arm/mach-s5pv210/include/mach/gpio-samsung.h b/arch/arm/mach-s5pv210/include/mach/gpio-samsung.h deleted file mode 100644 index e193b891e7b2..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/gpio-samsung.h +++ /dev/null @@ -1,135 +0,0 @@ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5PV210 - GPIO lib support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H __FILE__ - -/* Practically, GPIO banks up to MP03 are the configurable gpio banks */ - -/* GPIO bank sizes */ -#define S5PV210_GPIO_A0_NR (8) -#define S5PV210_GPIO_A1_NR (4) -#define S5PV210_GPIO_B_NR (8) -#define S5PV210_GPIO_C0_NR (5) -#define S5PV210_GPIO_C1_NR (5) -#define S5PV210_GPIO_D0_NR (4) -#define S5PV210_GPIO_D1_NR (6) -#define S5PV210_GPIO_E0_NR (8) -#define S5PV210_GPIO_E1_NR (5) -#define S5PV210_GPIO_F0_NR (8) -#define S5PV210_GPIO_F1_NR (8) -#define S5PV210_GPIO_F2_NR (8) -#define S5PV210_GPIO_F3_NR (6) -#define S5PV210_GPIO_G0_NR (7) -#define S5PV210_GPIO_G1_NR (7) -#define S5PV210_GPIO_G2_NR (7) -#define S5PV210_GPIO_G3_NR (7) -#define S5PV210_GPIO_H0_NR (8) -#define S5PV210_GPIO_H1_NR (8) -#define S5PV210_GPIO_H2_NR (8) -#define S5PV210_GPIO_H3_NR (8) -#define S5PV210_GPIO_I_NR (7) -#define S5PV210_GPIO_J0_NR (8) -#define S5PV210_GPIO_J1_NR (6) -#define S5PV210_GPIO_J2_NR (8) -#define S5PV210_GPIO_J3_NR (8) -#define S5PV210_GPIO_J4_NR (5) - -#define S5PV210_GPIO_MP01_NR (8) -#define S5PV210_GPIO_MP02_NR (4) -#define S5PV210_GPIO_MP03_NR (8) -#define S5PV210_GPIO_MP04_NR (8) -#define S5PV210_GPIO_MP05_NR (8) - -/* GPIO bank numbers */ - -/* CONFIG_S3C_GPIO_SPACE allows the user to select extra - * space for debugging purposes so that any accidental - * change from one gpio bank to another can be caught. -*/ - -#define S5PV210_GPIO_NEXT(__gpio) \ - ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) - -enum s5p_gpio_number { - S5PV210_GPIO_A0_START = 0, - S5PV210_GPIO_A1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A0), - S5PV210_GPIO_B_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_A1), - S5PV210_GPIO_C0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_B), - S5PV210_GPIO_C1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C0), - S5PV210_GPIO_D0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_C1), - S5PV210_GPIO_D1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D0), - S5PV210_GPIO_E0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_D1), - S5PV210_GPIO_E1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E0), - S5PV210_GPIO_F0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_E1), - S5PV210_GPIO_F1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F0), - S5PV210_GPIO_F2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F1), - S5PV210_GPIO_F3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F2), - S5PV210_GPIO_G0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_F3), - S5PV210_GPIO_G1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G0), - S5PV210_GPIO_G2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G1), - S5PV210_GPIO_G3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G2), - S5PV210_GPIO_H0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_G3), - S5PV210_GPIO_H1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H0), - S5PV210_GPIO_H2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H1), - S5PV210_GPIO_H3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H2), - S5PV210_GPIO_I_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_H3), - S5PV210_GPIO_J0_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_I), - S5PV210_GPIO_J1_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J0), - S5PV210_GPIO_J2_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J1), - S5PV210_GPIO_J3_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J2), - S5PV210_GPIO_J4_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J3), - S5PV210_GPIO_MP01_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_J4), - S5PV210_GPIO_MP02_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP01), - S5PV210_GPIO_MP03_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP02), - S5PV210_GPIO_MP04_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP03), - S5PV210_GPIO_MP05_START = S5PV210_GPIO_NEXT(S5PV210_GPIO_MP04), -}; - -/* S5PV210 GPIO number definitions */ -#define S5PV210_GPA0(_nr) (S5PV210_GPIO_A0_START + (_nr)) -#define S5PV210_GPA1(_nr) (S5PV210_GPIO_A1_START + (_nr)) -#define S5PV210_GPB(_nr) (S5PV210_GPIO_B_START + (_nr)) -#define S5PV210_GPC0(_nr) (S5PV210_GPIO_C0_START + (_nr)) -#define S5PV210_GPC1(_nr) (S5PV210_GPIO_C1_START + (_nr)) -#define S5PV210_GPD0(_nr) (S5PV210_GPIO_D0_START + (_nr)) -#define S5PV210_GPD1(_nr) (S5PV210_GPIO_D1_START + (_nr)) -#define S5PV210_GPE0(_nr) (S5PV210_GPIO_E0_START + (_nr)) -#define S5PV210_GPE1(_nr) (S5PV210_GPIO_E1_START + (_nr)) -#define S5PV210_GPF0(_nr) (S5PV210_GPIO_F0_START + (_nr)) -#define S5PV210_GPF1(_nr) (S5PV210_GPIO_F1_START + (_nr)) -#define S5PV210_GPF2(_nr) (S5PV210_GPIO_F2_START + (_nr)) -#define S5PV210_GPF3(_nr) (S5PV210_GPIO_F3_START + (_nr)) -#define S5PV210_GPG0(_nr) (S5PV210_GPIO_G0_START + (_nr)) -#define S5PV210_GPG1(_nr) (S5PV210_GPIO_G1_START + (_nr)) -#define S5PV210_GPG2(_nr) (S5PV210_GPIO_G2_START + (_nr)) -#define S5PV210_GPG3(_nr) (S5PV210_GPIO_G3_START + (_nr)) -#define S5PV210_GPH0(_nr) (S5PV210_GPIO_H0_START + (_nr)) -#define S5PV210_GPH1(_nr) (S5PV210_GPIO_H1_START + (_nr)) -#define S5PV210_GPH2(_nr) (S5PV210_GPIO_H2_START + (_nr)) -#define S5PV210_GPH3(_nr) (S5PV210_GPIO_H3_START + (_nr)) -#define S5PV210_GPI(_nr) (S5PV210_GPIO_I_START + (_nr)) -#define S5PV210_GPJ0(_nr) (S5PV210_GPIO_J0_START + (_nr)) -#define S5PV210_GPJ1(_nr) (S5PV210_GPIO_J1_START + (_nr)) -#define S5PV210_GPJ2(_nr) (S5PV210_GPIO_J2_START + (_nr)) -#define S5PV210_GPJ3(_nr) (S5PV210_GPIO_J3_START + (_nr)) -#define S5PV210_GPJ4(_nr) (S5PV210_GPIO_J4_START + (_nr)) -#define S5PV210_MP01(_nr) (S5PV210_GPIO_MP01_START + (_nr)) -#define S5PV210_MP02(_nr) (S5PV210_GPIO_MP02_START + (_nr)) -#define S5PV210_MP03(_nr) (S5PV210_GPIO_MP03_START + (_nr)) -#define S5PV210_MP04(_nr) (S5PV210_GPIO_MP04_START + (_nr)) -#define S5PV210_MP05(_nr) (S5PV210_GPIO_MP05_START + (_nr)) - -/* the end of the S5PV210 specific gpios */ -#define S5PV210_GPIO_END (S5PV210_MP05(S5PV210_GPIO_MP05_NR) + 1) -#define S3C_GPIO_END S5PV210_GPIO_END - -#endif /* __ASM_ARCH_GPIO_H */ |