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authorPaul Mundt <lethal@linux-sh.org>2010-05-31 12:59:19 +0900
committerPaul Mundt <lethal@linux-sh.org>2010-05-31 12:59:19 +0900
commit8fa76f7e61ef4e5bc97207143ea4e198b22487bc (patch)
tree266c42b6687e68e4febb72d8c031e5facd899a1c /arch/arm/mach-s5p6442
parenta41a7b91772da2c77ac0da74285fd8ebd86a85ba (diff)
parent67a3e12b05e055c0415c556a315a3d3eb637e29e (diff)
downloadblackbird-op-linux-8fa76f7e61ef4e5bc97207143ea4e198b22487bc.tar.gz
blackbird-op-linux-8fa76f7e61ef4e5bc97207143ea4e198b22487bc.zip
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/arm/mach-s5p6442')
-rw-r--r--arch/arm/mach-s5p6442/Makefile1
-rw-r--r--arch/arm/mach-s5p6442/dev-spi.c123
-rw-r--r--arch/arm/mach-s5p6442/include/mach/irqs.h5
-rw-r--r--arch/arm/mach-s5p6442/include/mach/map.h2
-rw-r--r--arch/arm/mach-s5p6442/include/mach/spi-clocks.h17
5 files changed, 146 insertions, 2 deletions
diff --git a/arch/arm/mach-s5p6442/Makefile b/arch/arm/mach-s5p6442/Makefile
index e30a7f76aee6..90a3d8373416 100644
--- a/arch/arm/mach-s5p6442/Makefile
+++ b/arch/arm/mach-s5p6442/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_SMDK6442) += mach-smdk6442.o
# device support
obj-y += dev-audio.o
+obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
diff --git a/arch/arm/mach-s5p6442/dev-spi.c b/arch/arm/mach-s5p6442/dev-spi.c
new file mode 100644
index 000000000000..30199525daca
--- /dev/null
+++ b/arch/arm/mach-s5p6442/dev-spi.c
@@ -0,0 +1,123 @@
+/* linux/arch/arm/mach-s5p6442/dev-spi.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ * Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+
+#include <mach/dma.h>
+#include <mach/map.h>
+#include <mach/irqs.h>
+#include <mach/gpio.h>
+#include <mach/spi-clocks.h>
+
+#include <plat/s3c64xx-spi.h>
+#include <plat/gpio-cfg.h>
+
+static char *spi_src_clks[] = {
+ [S5P6442_SPI_SRCCLK_PCLK] = "pclk",
+ [S5P6442_SPI_SRCCLK_SCLK] = "spi_epll",
+};
+
+/* SPI Controller platform_devices */
+
+/* Since we emulate multi-cs capability, we do not touch the CS.
+ * The emulated CS is toggled by board specific mechanism, as it can
+ * be either some immediate GPIO or some signal out of some other
+ * chip in between ... or some yet another way.
+ * We simply do not assume anything about CS.
+ */
+static int s5p6442_spi_cfg_gpio(struct platform_device *pdev)
+{
+ switch (pdev->id) {
+ case 0:
+ s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6442_GPB(2), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6442_GPB(3), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP);
+ break;
+
+ default:
+ dev_err(&pdev->dev, "Invalid SPI Controller number!");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static struct resource s5p6442_spi0_resource[] = {
+ [0] = {
+ .start = S5P6442_PA_SPI,
+ .end = S5P6442_PA_SPI + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_SPI0_TX,
+ .end = DMACH_SPI0_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_SPI0_RX,
+ .end = DMACH_SPI0_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = IRQ_SPI0,
+ .end = IRQ_SPI0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct s3c64xx_spi_info s5p6442_spi0_pdata = {
+ .cfg_gpio = s5p6442_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x1ff,
+ .rx_lvl_offset = 15,
+};
+
+static u64 spi_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device s5p6442_device_spi = {
+ .name = "s3c64xx-spi",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(s5p6442_spi0_resource),
+ .resource = s5p6442_spi0_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &s5p6442_spi0_pdata,
+ },
+};
+
+void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
+{
+ struct s3c64xx_spi_info *pd;
+
+ /* Reject invalid configuration */
+ if (!num_cs || src_clk_nr < 0
+ || src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) {
+ printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
+ return;
+ }
+
+ switch (cntrlr) {
+ case 0:
+ pd = &s5p6442_spi0_pdata;
+ break;
+ default:
+ printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
+ __func__, cntrlr);
+ return;
+ }
+
+ pd->num_cs = num_cs;
+ pd->src_clk_nr = src_clk_nr;
+ pd->src_clk_name = spi_src_clks[src_clk_nr];
+}
diff --git a/arch/arm/mach-s5p6442/include/mach/irqs.h b/arch/arm/mach-s5p6442/include/mach/irqs.h
index da665809f6e4..02c23749c023 100644
--- a/arch/arm/mach-s5p6442/include/mach/irqs.h
+++ b/arch/arm/mach-s5p6442/include/mach/irqs.h
@@ -77,8 +77,9 @@
#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1)
-#define IRQ_EINT(x) ((x) < 16 ? S5P_IRQ_VIC0(x) : \
- (S5P_IRQ_EINT_BASE + (x)-16))
+#define S5P_EINT_BASE1 (S5P_IRQ_VIC0(0))
+#define S5P_EINT_BASE2 (S5P_IRQ_EINT_BASE)
+
/* Set the default NR_IRQS */
#define NR_IRQS (IRQ_EINT(31) + 1)
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
index 7568dc0d6be0..32ca424ef7f9 100644
--- a/arch/arm/mach-s5p6442/include/mach/map.h
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -54,6 +54,8 @@
#define S5P6442_PA_SDRAM (0x20000000)
#define S5P_PA_SDRAM S5P6442_PA_SDRAM
+#define S5P6442_PA_SPI 0xEC300000
+
/* I2S */
#define S5P6442_PA_I2S0 0xC0B00000
#define S5P6442_PA_I2S1 0xF2200000
diff --git a/arch/arm/mach-s5p6442/include/mach/spi-clocks.h b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..7fd88205a97c
--- /dev/null
+++ b/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
@@ -0,0 +1,17 @@
+/* linux/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
+ *
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ * Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __S5P6442_PLAT_SPI_CLKS_H
+#define __S5P6442_PLAT_SPI_CLKS_H __FILE__
+
+#define S5P6442_SPI_SRCCLK_PCLK 0
+#define S5P6442_SPI_SRCCLK_SCLK 1
+
+#endif /* __S5P6442_PLAT_SPI_CLKS_H */
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