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| author | Heiko Stuebner <heiko@sntech.de> | 2012-03-07 02:00:05 -0800 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-03-07 02:00:05 -0800 |
| commit | 2e5ac9436645bb9fd2097868e228321f303c9c75 (patch) | |
| tree | 716f176f5299c6cd98382d429fefa4f516f5d48e /arch/arm/mach-s3c24xx/common-s3c2443.c | |
| parent | 9edc12a1a9db50fd7659463adf5a0e1eb5f2ce0d (diff) | |
| download | blackbird-op-linux-2e5ac9436645bb9fd2097868e228321f303c9c75.tar.gz blackbird-op-linux-2e5ac9436645bb9fd2097868e228321f303c9c75.zip | |
ARM: S3C24XX: remove call to s3c24xx_setup_clocks
As the clocks can calculate their rate themself now, there is no
need to set it statically.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c24xx/common-s3c2443.c')
| -rw-r--r-- | arch/arm/mach-s3c24xx/common-s3c2443.c | 15 |
1 files changed, 4 insertions, 11 deletions
diff --git a/arch/arm/mach-s3c24xx/common-s3c2443.c b/arch/arm/mach-s3c24xx/common-s3c2443.c index 46795db2af41..7414890e6ee8 100644 --- a/arch/arm/mach-s3c24xx/common-s3c2443.c +++ b/arch/arm/mach-s3c24xx/common-s3c2443.c @@ -571,9 +571,6 @@ void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll) struct clk *xtal_clk; unsigned long xtal; unsigned long pll; - unsigned long fclk; - unsigned long hclk; - unsigned long pclk; int ptr; xtal_clk = clk_get(NULL, "xtal"); @@ -582,17 +579,13 @@ void __init_or_cpufreq s3c2443_common_setup_clocks(pll_fn get_mpll) pll = get_mpll(mpllcon, xtal); clk_msysclk.clk.rate = pll; - - fclk = clk_get_rate(&clk_armdiv); - hclk = clk_get_rate(&clk_h); - pclk = clk_get_rate(&clk_p); - - s3c24xx_setup_clocks(fclk, hclk, pclk); + clk_mpll.rate = pll; printk("CPU: MPLL %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n", (mpllcon & S3C2443_PLLCON_OFF) ? "off" : "on", - print_mhz(pll), print_mhz(fclk), - print_mhz(hclk), print_mhz(pclk)); + print_mhz(pll), print_mhz(clk_get_rate(&clk_armdiv)), + print_mhz(clk_get_rate(&clk_h)), + print_mhz(clk_get_rate(&clk_p))); for (ptr = 0; ptr < ARRAY_SIZE(clksrc_clks); ptr++) s3c_set_clksrc(&clksrc_clks[ptr], true); |
