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authorRobert Jarzmik <robert.jarzmik@free.fr>2014-11-24 23:18:22 +0100
committerRobert Jarzmik <robert.jarzmik@free.fr>2014-12-26 18:03:20 +0100
commit3ad32229bed9953dd2085ef992adb161ed0c9194 (patch)
treedf3af4431fd05ad5a88f4d9dab7494eeb507e852 /arch/arm/mach-pxa/include
parent95d8c4c8499f8a868af719ecfb005f55c959c73a (diff)
downloadblackbird-op-linux-3ad32229bed9953dd2085ef992adb161ed0c9194.tar.gz
blackbird-op-linux-3ad32229bed9953dd2085ef992adb161ed0c9194.zip
ARM: pxa: arbitrarily set first interrupt number
As IRQ0, the legacy timer interrupt should not be used as an interrupt number, shift the interrupts by a fixed number. As we had in a special case a shift of 16 when ISA bus was used on a PXA, use that value as the first interrupt number, regardless of ISA or not. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Diffstat (limited to 'arch/arm/mach-pxa/include')
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h9
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 48c2fd851686..83e04d4e72a8 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -12,14 +12,9 @@
#ifndef __ASM_MACH_IRQS_H
#define __ASM_MACH_IRQS_H
-#ifdef CONFIG_PXA_HAVE_ISA_IRQS
-#define PXA_ISA_IRQ(x) (x)
-#define PXA_ISA_IRQ_NUM (16)
-#else
-#define PXA_ISA_IRQ_NUM (0)
-#endif
+#include <asm/irq.h>
-#define PXA_IRQ(x) (PXA_ISA_IRQ_NUM + (x))
+#define PXA_IRQ(x) (NR_IRQS_LEGACY + (x))
#define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */
#define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */
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