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| author | R Sricharan <r.sricharan@ti.com> | 2011-11-04 15:52:59 +0530 |
|---|---|---|
| committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2012-07-09 19:14:39 +0530 |
| commit | e17933c2c0173ec19aa2450e4be79b7adfd52224 (patch) | |
| tree | dab8ae0ebcaf539177a4aedf8c6e709921a71119 /arch/arm/mach-omap2/omap_l3_noc.h | |
| parent | 1a5da219a4726dbddb189ac18bc246d51b04c972 (diff) | |
| download | blackbird-op-linux-e17933c2c0173ec19aa2450e4be79b7adfd52224.tar.gz blackbird-op-linux-e17933c2c0173ec19aa2450e4be79b7adfd52224.zip | |
ARM: OMAP5: l3: Add l3 error handler support for omap5
The l3 interconnect ip is same for OMAP4 and OMAP5.
So reuse the l3 error handler error code for OMAP5
as well. Also a few targets has been newly added for
OMAP5. So updating the driver for that here.
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_l3_noc.h')
| -rw-r--r-- | arch/arm/mach-omap2/omap_l3_noc.h | 22 |
1 files changed, 18 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h index 90b50984cd2e..a6ce34dc4814 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.h +++ b/arch/arm/mach-omap2/omap_l3_noc.h @@ -51,7 +51,9 @@ static u32 l3_targ_inst_clk1[] = { 0x200, /* DMM2 */ 0x300, /* ABE */ 0x400, /* L4CFG */ - 0x600 /* CLK2 PWR DISC */ + 0x600, /* CLK2 PWR DISC */ + 0x0, /* Host CLK1 */ + 0x900 /* L4 Wakeup */ }; static u32 l3_targ_inst_clk2[] = { @@ -72,11 +74,16 @@ static u32 l3_targ_inst_clk2[] = { 0xE00, /* missing in TRM corresponds to AES2*/ 0xC00, /* L4 PER3 */ 0xA00, /* L4 PER1*/ - 0xB00 /* L4 PER2*/ + 0xB00, /* L4 PER2*/ + 0x0, /* HOST CLK2 */ + 0x1800, /* CAL */ + 0x1700 /* LLI */ }; static u32 l3_targ_inst_clk3[] = { - 0x0100 /* EMUSS */ + 0x0100 /* EMUSS */, + 0x0300, /* DEBUGSS_CT_TBR */ + 0x0 /* HOST CLK3 */ }; static struct l3_masters_data { @@ -110,13 +117,15 @@ static struct l3_masters_data { { 0xC8, "USBHOSTFS"} }; -static char *l3_targ_inst_name[L3_MODULES][18] = { +static char *l3_targ_inst_name[L3_MODULES][21] = { { "DMM1", "DMM2", "ABE", "L4CFG", "CLK2 PWR DISC", + "HOST CLK1", + "L4 WAKEUP" }, { "CORTEX M3" , @@ -137,9 +146,14 @@ static char *l3_targ_inst_name[L3_MODULES][18] = { "L4 PER3", "L4 PER1", "L4 PER2", + "HOST CLK2", + "CAL", + "LLI" }, { "EMUSS", + "DEBUG SOURCE", + "HOST CLK3" }, }; |
