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authorDavid Woodhouse <David.Woodhouse@intel.com>2012-08-22 12:54:55 +0100
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-08-22 12:55:43 +0100
commit2361f738b67ab7f1152187fa3d321a09b7c95c09 (patch)
treeeddf2b958215b668b9b871b6b59bc76c67a47751 /arch/arm/mach-omap2/omap-headsmp.S
parent4800399e335658aae632f587f6759a860f584804 (diff)
parentd9875690d9b89a866022ff49e3fcea892345ad92 (diff)
downloadblackbird-op-linux-2361f738b67ab7f1152187fa3d321a09b7c95c09.tar.gz
blackbird-op-linux-2361f738b67ab7f1152187fa3d321a09b7c95c09.zip
Merge tag 'v3.6-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux
Having missed the merge window, update to 3.6-rc2 to avoid conflicts with new patches. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap-headsmp.S')
-rw-r--r--arch/arm/mach-omap2/omap-headsmp.S21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S
index 503ac777a2ba..502e3135aad3 100644
--- a/arch/arm/mach-omap2/omap-headsmp.S
+++ b/arch/arm/mach-omap2/omap-headsmp.S
@@ -19,6 +19,27 @@
#include <linux/init.h>
__CPUINIT
+
+/* Physical address needed since MMU not enabled yet on secondary core */
+#define AUX_CORE_BOOT0_PA 0x48281800
+
+/*
+ * OMAP5 specific entry point for secondary CPU to jump from ROM
+ * code. This routine also provides a holding flag into which
+ * secondary core is held until we're ready for it to initialise.
+ * The primary core will update this flag using a hardware
++ * register AuxCoreBoot0.
+ */
+ENTRY(omap5_secondary_startup)
+wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
+ ldr r0, [r2]
+ mov r0, r0, lsr #5
+ mrc p15, 0, r4, c0, c0, 5
+ and r4, r4, #0x0f
+ cmp r0, r4
+ bne wait
+ b secondary_startup
+END(omap5_secondary_startup)
/*
* OMAP4 specific entry point for secondary CPU to jump from ROM
* code. This routine also provides a holding flag into which
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