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| author | Adrian Hunter <adrian.hunter@nokia.com> | 2010-12-09 10:48:27 +0200 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2010-12-21 12:05:25 -0800 |
| commit | a3551f5b0c3ca7aaa053e554e3ee766983b5d713 (patch) | |
| tree | 76fec6e7169219e26c67ff206713b2d09771e33b /arch/arm/mach-omap2/gpmc-onenand.c | |
| parent | 4584acc3ee236424b5d0b52f143d980cae3c2be5 (diff) | |
| download | blackbird-op-linux-a3551f5b0c3ca7aaa053e554e3ee766983b5d713.tar.gz blackbird-op-linux-a3551f5b0c3ca7aaa053e554e3ee766983b5d713.zip | |
OMAP2/3: GPMC: put sync_clk value in picoseconds instead of nanoseconds
The calculations done with sync_clk are anyway in picoseconds
and switching to picoseconds allows sync_clk values that are
not a whole number of nanoseconds - which is sometimes the
case.
Signed-off-by: Adrian Hunter <adrian.hunter@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/gpmc-onenand.c')
| -rw-r--r-- | arch/arm/mach-omap2/gpmc-onenand.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/mach-omap2/gpmc-onenand.c b/arch/arm/mach-omap2/gpmc-onenand.c index 7bb69220adfa..1db606ca007e 100644 --- a/arch/arm/mach-omap2/gpmc-onenand.c +++ b/arch/arm/mach-omap2/gpmc-onenand.c @@ -174,7 +174,7 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, switch (freq) { case 83: - min_gpmc_clk_period = 12; /* 83 MHz */ + min_gpmc_clk_period = 12000; /* 83 MHz */ t_ces = 5; t_avds = 4; t_avdh = 2; @@ -183,7 +183,7 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, t_rdyo = 9; break; case 66: - min_gpmc_clk_period = 15; /* 66 MHz */ + min_gpmc_clk_period = 15000; /* 66 MHz */ t_ces = 6; t_avds = 5; t_avdh = 2; @@ -192,7 +192,7 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, t_rdyo = 11; break; default: - min_gpmc_clk_period = 18; /* 54 MHz */ + min_gpmc_clk_period = 18500; /* 54 MHz */ t_ces = 7; t_avds = 7; t_avdh = 7; @@ -271,8 +271,8 @@ static int omap2_onenand_set_sync_mode(struct omap_onenand_platform_data *cfg, t.wr_cycle = t.rd_cycle; if (cpu_is_omap34xx()) { t.wr_data_mux_bus = gpmc_ticks_to_ns(fclk_offset + - gpmc_ns_to_ticks(min_gpmc_clk_period + - t_rdyo)); + gpmc_ps_to_ticks(min_gpmc_clk_period + + t_rdyo * 1000)); t.wr_access = t.access; } } else { |
