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authorJon Hunter <jon-hunter@ti.com>2011-10-07 00:53:01 -0600
committerPaul Walmsley <paul@pwsan.com>2011-10-07 01:01:22 -0600
commit49642ac816a714f3037b7cd6401a46c8fe46e795 (patch)
tree1bfd6d38e653f257ef83a8dcba73d413620bf872 /arch/arm/mach-omap2/dpll3xxx.c
parent273a1ce9cf27ac3900325b59aa78cc07bb574e9e (diff)
downloadblackbird-op-linux-49642ac816a714f3037b7cd6401a46c8fe46e795.tar.gz
blackbird-op-linux-49642ac816a714f3037b7cd6401a46c8fe46e795.zip
ARM: OMAP3+: dpll: use DPLLs recalc function instead of omap2_get_dpll_rate
This is a continuation of Mike Turquette's patch "OMAP3+: use DPLL's round_rate when setting rate". omap3_noncore_dpll_set_rate() and omap3_noncore_dpll_enable() call omap2_get_dpll_rate() explicitly. It may be necessary for some DPLLs to use a different function and so use the DPLLs recalc() function pointer instead. An example is the DPLL_ABE on OMAP4 which can have a 4X multiplier in addition to the usual MN multipler and dividers and therefore uses a different round_rate and recalc function. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Cc: Mike Turquette <mturquette@ti.com> Cc: Misael Lopez Cruz <misael.lopez@ti.com> [paul@pwsan.com: merged this patch with Mike's "use clock's recalc in DPLL handling" patch; also reported by Misael] Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/dpll3xxx.c')
-rw-r--r--arch/arm/mach-omap2/dpll3xxx.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index 73a1595c5f21..fc56745676fa 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -390,7 +390,8 @@ int omap3_noncore_dpll_enable(struct clk *clk)
* propagating?
*/
if (!r)
- clk->rate = omap2_get_dpll_rate(clk);
+ clk->rate = (clk->recalc) ? clk->recalc(clk) :
+ omap2_get_dpll_rate(clk);
return r;
}
@@ -424,6 +425,7 @@ void omap3_noncore_dpll_disable(struct clk *clk)
int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
{
struct clk *new_parent = NULL;
+ unsigned long hw_rate;
u16 freqsel = 0;
struct dpll_data *dd;
int ret;
@@ -435,7 +437,8 @@ int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate)
if (!dd)
return -EINVAL;
- if (rate == omap2_get_dpll_rate(clk))
+ hw_rate = (clk->recalc) ? clk->recalc(clk) : omap2_get_dpll_rate(clk);
+ if (rate == hw_rate)
return 0;
/*
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