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| author | Paul Walmsley <paul@pwsan.com> | 2009-05-12 17:27:10 -0600 |
|---|---|---|
| committer | paul <paul@twilight.(none)> | 2009-05-12 17:27:10 -0600 |
| commit | b7aee4bfa7cad909220491214037731c1edb510a (patch) | |
| tree | e8f01165e2e8b92e1eaef40badc6ad55f4dbb122 /arch/arm/mach-omap2/clock34xx.c | |
| parent | 4519c2bf433b97d091635eb51e4ba8ffa1c84d62 (diff) | |
| download | blackbird-op-linux-b7aee4bfa7cad909220491214037731c1edb510a.tar.gz blackbird-op-linux-b7aee4bfa7cad909220491214037731c1edb510a.zip | |
OMAP3 clock: use pr_debug() rather than pr_info() in some clock change code
The CORE DPLL M2 frequency change code should use pr_debug(), not
pr_info(), for its debug messages. Same with
omap2_clksel_round_rate_div(). While here, convert a few printk(KERN_ERR ..
into pr_err().
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.c')
| -rw-r--r-- | arch/arm/mach-omap2/clock34xx.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index 811360af60dc..2ee58fa5dc70 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c @@ -737,10 +737,10 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) unlock_dll = 1; } - pr_info("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate, - validrate); - pr_info("clock: SDRC timing params used: %08x %08x %08x\n", - sp->rfr_ctrl, sp->actim_ctrla, sp->actim_ctrlb); + pr_debug("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate, + validrate); + pr_debug("clock: SDRC timing params used: %08x %08x %08x\n", + sp->rfr_ctrl, sp->actim_ctrla, sp->actim_ctrlb); /* REVISIT: SRAM code doesn't support other M2 divisors yet */ WARN_ON(new_div != 1 && new_div != 2); |
