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author | Tony Lindgren <tony@atomide.com> | 2009-10-19 17:26:19 -0700 |
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committer | Tony Lindgren <tony@atomide.com> | 2009-10-19 17:26:19 -0700 |
commit | c97c686467420f6765c7bc5bdae2b2aca141068b (patch) | |
tree | b5d74b16770744de0b2fa918f1643d0a8c0db8d2 /arch/arm/mach-omap1/include/mach/entry-macro.S | |
parent | aca59b8922ad32e0555f78f99bcb31b5e24abe36 (diff) | |
download | blackbird-op-linux-c97c686467420f6765c7bc5bdae2b2aca141068b.tar.gz blackbird-op-linux-c97c686467420f6765c7bc5bdae2b2aca141068b.zip |
omap: headers: Split entry-macro.S for mach-omap1 and mach-omap2
Split entry-macro.S for mach-omap1 and mach-omap2
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap1/include/mach/entry-macro.S')
-rw-r--r-- | arch/arm/mach-omap1/include/mach/entry-macro.S | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S new file mode 100644 index 000000000000..df9060edda28 --- /dev/null +++ b/arch/arm/mach-omap1/include/mach/entry-macro.S @@ -0,0 +1,58 @@ +/* + * arch/arm/mach-omap1/include/mach/entry-macro.S + * + * Low-level IRQ helper macros for OMAP-based platforms + * + * Copyright (C) 2009 Texas Instruments + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ +#include <mach/hardware.h> +#include <mach/io.h> +#include <mach/irqs.h> +#include <asm/hardware/gic.h> + +#if (defined(CONFIG_ARCH_OMAP730)||defined(CONFIG_ARCH_OMAP850)) && \ + (defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)) +#error "FIXME: OMAP7XX doesn't support multiple-OMAP" +#elif defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850) +#define INT_IH2_IRQ INT_7XX_IH2_IRQ +#elif defined(CONFIG_ARCH_OMAP15XX) +#define INT_IH2_IRQ INT_1510_IH2_IRQ +#elif defined(CONFIG_ARCH_OMAP16XX) +#define INT_IH2_IRQ INT_1610_IH2_IRQ +#else +#warning "IH2 IRQ defaulted" +#define INT_IH2_IRQ INT_1510_IH2_IRQ +#endif + + .macro disable_fiq + .endm + + .macro get_irqnr_preamble, base, tmp + .endm + + .macro arch_ret_to_user, tmp1, tmp2 + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) + ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] + ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET] + mov \irqstat, #0xffffffff + bic \tmp, \irqstat, \tmp + tst \irqnr, \tmp + beq 1510f + + ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET] + cmp \irqnr, #0 + ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] + cmpeq \irqnr, #INT_IH2_IRQ + ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE) + ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET] + addeqs \irqnr, \irqnr, #32 +1510: + .endm + |