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| author | Stepan Moskovchenko <stepanm@codeaurora.org> | 2010-08-24 19:51:15 -0700 |
|---|---|---|
| committer | Daniel Walker <dwalker@codeaurora.org> | 2010-10-08 15:12:52 -0700 |
| commit | d9c8279b326e18bcb25ee9d12fe7513d24f8bbb1 (patch) | |
| tree | a2559867801db35cf1784e3e9cc91e25b80410e4 /arch/arm/mach-msm/include | |
| parent | c6a5951ee53db0f275dd85a702325c981c8d8c4c (diff) | |
| download | blackbird-op-linux-d9c8279b326e18bcb25ee9d12fe7513d24f8bbb1.tar.gz blackbird-op-linux-d9c8279b326e18bcb25ee9d12fe7513d24f8bbb1.zip | |
msm: Platform data for msm8x60 IOMMUs
Add the platform data for the IOMMUs found on the Qualcomm
msm8x60 SoC.
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/include')
| -rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-8x60.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h index 88df7ca96f2d..45bab50e3ee6 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h @@ -65,4 +65,37 @@ #define MSM_GPT_BASE (MSM_TMR_BASE + 0x4) #define MSM_DGT_BASE (MSM_TMR_BASE + 0x24) +#define MSM_IOMMU_JPEGD_PHYS 0x07300000 +#define MSM_IOMMU_JPEGD_SIZE SZ_1M + +#define MSM_IOMMU_VPE_PHYS 0x07400000 +#define MSM_IOMMU_VPE_SIZE SZ_1M + +#define MSM_IOMMU_MDP0_PHYS 0x07500000 +#define MSM_IOMMU_MDP0_SIZE SZ_1M + +#define MSM_IOMMU_MDP1_PHYS 0x07600000 +#define MSM_IOMMU_MDP1_SIZE SZ_1M + +#define MSM_IOMMU_ROT_PHYS 0x07700000 +#define MSM_IOMMU_ROT_SIZE SZ_1M + +#define MSM_IOMMU_IJPEG_PHYS 0x07800000 +#define MSM_IOMMU_IJPEG_SIZE SZ_1M + +#define MSM_IOMMU_VFE_PHYS 0x07900000 +#define MSM_IOMMU_VFE_SIZE SZ_1M + +#define MSM_IOMMU_VCODEC_A_PHYS 0x07A00000 +#define MSM_IOMMU_VCODEC_A_SIZE SZ_1M + +#define MSM_IOMMU_VCODEC_B_PHYS 0x07B00000 +#define MSM_IOMMU_VCODEC_B_SIZE SZ_1M + +#define MSM_IOMMU_GFX3D_PHYS 0x07C00000 +#define MSM_IOMMU_GFX3D_SIZE SZ_1M + +#define MSM_IOMMU_GFX2D0_PHYS 0x07D00000 +#define MSM_IOMMU_GFX2D0_SIZE SZ_1M + #endif |
