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| author | Alexandre Pereira da Silva <aletes.xgr@gmail.com> | 2012-06-13 19:28:23 -0300 |
|---|---|---|
| committer | Roland Stigge <stigge@antcom.de> | 2012-06-14 16:16:19 +0200 |
| commit | 112e9adda4ddcd56895f20c4c886d2493d7907f3 (patch) | |
| tree | 123c1790ac66b737307237d1201db0932b2b4d40 /arch/arm/mach-lpc32xx/phy3250.c | |
| parent | 72b78cf713176f376f369df8ccca865c5d51c42b (diff) | |
| download | blackbird-op-linux-112e9adda4ddcd56895f20c4c886d2493d7907f3.tar.gz blackbird-op-linux-112e9adda4ddcd56895f20c4c886d2493d7907f3.zip | |
ARM: LPC32xx: Cleanup board init, remove duplicate clock init
Remove SSP0, CLCD and DMA clocks that are already migrated to
the clock framework.
Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>
Diffstat (limited to 'arch/arm/mach-lpc32xx/phy3250.c')
| -rw-r--r-- | arch/arm/mach-lpc32xx/phy3250.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index 93408883eaca..d7389598c21a 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -272,28 +272,11 @@ static void __init lpc3250_machine_init(void) lpc32xx_serial_init(); - /* - * AMBA peripheral clocks need to be enabled prior to AMBA device - * detection or a data fault will occur, so enable the clocks - * here. - */ tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL); tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_EN | LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN; __raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL); - tmp = __raw_readl(LPC32XX_CLKPWR_LCDCLK_CTRL); - __raw_writel((tmp | LPC32XX_CLKPWR_LCDCTRL_CLK_EN), - LPC32XX_CLKPWR_LCDCLK_CTRL); - - tmp = __raw_readl(LPC32XX_CLKPWR_SSP_CLK_CTRL); - __raw_writel((tmp | LPC32XX_CLKPWR_SSPCTRL_SSPCLK0_EN), - LPC32XX_CLKPWR_SSP_CLK_CTRL); - - tmp = __raw_readl(LPC32XX_CLKPWR_DMA_CLK_CTRL); - __raw_writel((tmp | LPC32XX_CLKPWR_DMACLKCTRL_CLK_EN), - LPC32XX_CLKPWR_DMA_CLK_CTRL); - /* Test clock needed for UDA1380 initial init */ __raw_writel(LPC32XX_CLKPWR_TESTCLK2_SEL_MOSC | LPC32XX_CLKPWR_TESTCLK_TESTCLK2_EN, |
