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author | Raffaele Recalcati <raffaele.recalcati@bticino.it> | 2010-07-06 10:39:04 +0200 |
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committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-07-06 23:54:07 +0900 |
commit | d9823ed9fa3126097dfd2bbce6dc33957c1be728 (patch) | |
tree | a929aead29f43232b408b182ce5a5e5e4c8654a0 /arch/arm/mach-davinci/include/mach/asp.h | |
parent | ec6375533748806a1a49dad7ce124cc02886854a (diff) | |
download | blackbird-op-linux-d9823ed9fa3126097dfd2bbce6dc33957c1be728.tar.gz blackbird-op-linux-d9823ed9fa3126097dfd2bbce6dc33957c1be728.zip |
ASoC: DaVinci: More accurate continuous serial clock for McBSP (I2S)
i2s_accurate_sck switch can be used to have a better approximate
sampling frequency.
The clock is an externally visible bit clock and it is named
i2s continuous serial clock (I2S_SCK).
The trade off is between more accurate clock (fast clock)
and less accurate clock (slow clock).
The waveform will be not symmetric.
Probably it is possible to get a better algorithm for calculating
the divider, trying to keep a slower clock as possible.
This patch has been developed against the
http://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci.git
git tree and has been tested on bmx board (similar to dm365 evm, but using
uda1345 as external audio codec).
Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
Signed-off-by: Davide Bonfanti <davide.bonfanti@bticino.it>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Acked-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/asp.h')
-rw-r--r-- | arch/arm/mach-davinci/include/mach/asp.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/asp.h b/arch/arm/mach-davinci/include/mach/asp.h index 0847d2144f1f..b12c69edeea5 100644 --- a/arch/arm/mach-davinci/include/mach/asp.h +++ b/arch/arm/mach-davinci/include/mach/asp.h @@ -73,6 +73,39 @@ struct snd_platform_data { */ int clk_input_pin; + /* + * This flag works when both clock and FS are outputs for the cpu + * and makes clock more accurate (FS is not symmetrical and the + * clock is very fast. + * The clock becoming faster is named + * i2s continuous serial clock (I2S_SCK) and it is an externally + * visible bit clock. + * + * first line : WordSelect + * second line : ContinuousSerialClock + * third line: SerialData + * + * SYMMETRICAL APPROACH: + * _______________________ LEFT + * _| RIGHT |______________________| + * _ _ _ _ _ _ _ _ + * _| |_| |_ x16 _| |_| |_| |_| |_ x16 _| |_| |_ + * _ _ _ _ _ _ _ _ + * _/ \_/ \_ ... _/ \_/ \_/ \_/ \_ ... _/ \_/ \_ + * \_/ \_/ \_/ \_/ \_/ \_/ \_/ \_/ + * + * ACCURATE CLOCK APPROACH: + * ______________ LEFT + * _| RIGHT |_______________________________| + * _ _ _ _ _ _ _ _ _ + * _| |_ x16 _| |_| |_ x16 _| |_| |_| |_| |_| |_| | + * _ _ _ _ dummy cycles + * _/ \_ ... _/ \_/ \_ ... _/ \__________________ + * \_/ \_/ \_/ \_/ + * + */ + bool i2s_accurate_sck; + /* McASP specific fields */ int tdm_slots; u8 op_mode; |