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author | Olof Johansson <olof@lixom.net> | 2013-04-19 11:50:32 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2013-04-19 11:51:24 -0700 |
commit | 61b464aef0e306f141dbc0bb3f9c58049a987a7e (patch) | |
tree | e4a43e5b52f72df8e8417aa918f2fe3ea57d0071 /arch/arm/mach-at91/pm.h | |
parent | a71efd61db6368629b1b3e403076c957207f79bd (diff) | |
parent | f5fa4098c3fcc0e504fbc0682dccd331dbbcf197 (diff) | |
download | blackbird-op-linux-61b464aef0e306f141dbc0bb3f9c58049a987a7e.tar.gz blackbird-op-linux-61b464aef0e306f141dbc0bb3f9c58049a987a7e.zip |
Merge tag 'at91-soc' of git://github.com/at91linux/linux-at91 into late/cleanup
From Nicolas Ferre:
Little modification in SoC presentation in kernel log.
Removing of a long-standing warning in sam9263 PM code.
* tag 'at91-soc' of git://github.com/at91linux/linux-at91:
ARM: at91: suspend both memory controllers on at91sam9263
ARM: at91: change "Unknown" qualifier SoC subtype handling
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-at91/pm.h')
-rw-r--r-- | arch/arm/mach-at91/pm.h | 30 |
1 files changed, 24 insertions, 6 deletions
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 38f467c6b710..2f5908f0b8c5 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -70,13 +70,31 @@ static inline void at91sam9g45_standby(void) at91_ramc_write(1, AT91_DDRSDRC_LPR, saved_lpr1); } -#ifdef CONFIG_SOC_AT91SAM9263 -/* - * FIXME either or both the SDRAM controllers (EB0, EB1) might be in use; - * handle those cases both here and in the Suspend-To-RAM support. +/* We manage both DDRAM/SDRAM controllers, we need more than one value to + * remember. */ -#warning Assuming EB1 SDRAM controller is *NOT* used -#endif +static inline void at91sam9263_standby(void) +{ + u32 lpr0, lpr1; + u32 saved_lpr0, saved_lpr1; + + saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR); + lpr1 = saved_lpr1 & ~AT91_SDRAMC_LPCB; + lpr1 |= AT91_SDRAMC_LPCB_SELF_REFRESH; + + saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR); + lpr0 = saved_lpr0 & ~AT91_SDRAMC_LPCB; + lpr0 |= AT91_SDRAMC_LPCB_SELF_REFRESH; + + /* self-refresh mode now */ + at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0); + at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1); + + cpu_do_idle(); + + at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0); + at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1); +} static inline void at91sam9_standby(void) { |