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author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-09-15 18:15:55 +0200 |
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committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-09-22 11:39:06 +0200 |
commit | 726d32bf79ef4042004535c9af9c8ea543abe46f (patch) | |
tree | ca28c5477eb81a6b595f5574c7789c7fddee9cce /arch/arm/mach-at91/include/mach/hardware.h | |
parent | 2dc850b62e5b727a5413b60197cdddf92ab4f1a2 (diff) | |
download | blackbird-op-linux-726d32bf79ef4042004535c9af9c8ea543abe46f.tar.gz blackbird-op-linux-726d32bf79ef4042004535c9af9c8ea543abe46f.zip |
ARM: at91: SAMA5D4 SoC detection code and low level routines
SoC identification code, kernel uncompress and low level
debugging routines update.
On SAMA5D4, DBGU is at another address AT91_BASE_DBGU2 so another
round of detection is needed. We also had to differentiate with
SAMA5D3 SoC family and rename some variables.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/hardware.h')
-rw-r--r-- | arch/arm/mach-at91/include/mach/hardware.h | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm/mach-at91/include/mach/hardware.h b/arch/arm/mach-at91/include/mach/hardware.h index 56338245653a..d84776f6b8ac 100644 --- a/arch/arm/mach-at91/include/mach/hardware.h +++ b/arch/arm/mach-at91/include/mach/hardware.h @@ -19,8 +19,10 @@ /* DBGU base */ /* rm9200, 9260/9g20, 9261/9g10, 9rl */ #define AT91_BASE_DBGU0 0xfffff200 -/* 9263, 9g45 */ +/* 9263, 9g45, sama5d3 */ #define AT91_BASE_DBGU1 0xffffee00 +/* sama5d4 */ +#define AT91_BASE_DBGU2 0xfc069000 #if defined(CONFIG_ARCH_AT91X40) #include <mach/at91x40.h> @@ -34,6 +36,7 @@ #include <mach/at91sam9x5.h> #include <mach/at91sam9n12.h> #include <mach/sama5d3.h> +#include <mach/sama5d4.h> /* * On all at91 except rm9200 and x40 have the System Controller starts @@ -47,6 +50,11 @@ * and map the same memory space */ #define AT91_BASE_SYS 0xffffc000 + +/* + * On sama5d4 there is no system controller, we map some needed peripherals + */ +#define AT91_ALT_BASE_SYS 0xfc069000 #endif /* @@ -69,6 +77,13 @@ */ #define AT91_IO_PHYS_BASE 0xFFF78000 #define AT91_IO_VIRT_BASE IOMEM(0xFF000000 - AT91_IO_SIZE) + +/* + * On sama5d4, remap the peripherals from address 0xFC069000 .. 0xFC06F000 + * to 0xFB069000 .. 0xFB06F000. (24Kb) + */ +#define AT91_ALT_IO_PHYS_BASE AT91_ALT_BASE_SYS +#define AT91_ALT_IO_VIRT_BASE IOMEM(0xFB069000) #else /* * Identity mapping for the non MMU case. @@ -81,11 +96,13 @@ /* Convert a physical IO address to virtual IO address */ #define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE) +#define AT91_ALT_IO_P2V(x) ((x) - AT91_ALT_IO_PHYS_BASE + AT91_ALT_IO_VIRT_BASE) /* * Virtual to Physical Address mapping for IO devices. */ #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) +#define AT91_ALT_VA_BASE_SYS AT91_ALT_IO_P2V(AT91_ALT_BASE_SYS) /* Internal SRAM is mapped below the IO devices */ #define AT91_SRAM_MAX SZ_1M |