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| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2015-06-16 14:12:57 +0200 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2015-06-17 17:23:36 +0200 |
| commit | 2f5bc307be2480ba89e4c5d118f406f04a4a7299 (patch) | |
| tree | cb54687d81888c61ef79d83bf4b9f1fb7e19d549 /arch/arm/crypto/aesbs-core.S_shipped | |
| parent | 885dbd154b2f2ee305cec6fd0a162e1a77ae2b06 (diff) | |
| download | blackbird-op-linux-2f5bc307be2480ba89e4c5d118f406f04a4a7299.tar.gz blackbird-op-linux-2f5bc307be2480ba89e4c5d118f406f04a4a7299.zip | |
ARM: mvebu: fix suspend to RAM on big-endian configurations
The current Armada XP suspend to RAM implementation, as added in
commit 27432825ae19f ("ARM: mvebu: Armada XP GP specific
suspend/resume code") does not handle big-endian configurations
properly: the small bit of assembly code putting the DRAM in
self-refresh and toggling the GPIOs to turn off power forgets to
convert the values to little-endian.
This commit fixes that by making sure the two values we will write to
the DRAM controller register and GPIO register are already in
little-endian before entering the critical assembly code.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.19+
Fixes: 27432825ae19f ("ARM: mvebu: Armada XP GP specific suspend/resume code")
Diffstat (limited to 'arch/arm/crypto/aesbs-core.S_shipped')
0 files changed, 0 insertions, 0 deletions
