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authorBenoit Cousson <b-cousson@ti.com>2011-08-16 11:49:08 +0200
committerBenoit Cousson <b-cousson@ti.com>2011-10-04 22:29:40 +0200
commit476b679a5d785d1244f6b43ad26877acf278cd18 (patch)
treec3f93d9742c4654c9d10af829db1122bac0b6f6f /arch/arm/boot
parentad8dfac66fb1995014060302bda19a15bc62bd6d (diff)
downloadblackbird-op-linux-476b679a5d785d1244f6b43ad26877acf278cd18.tar.gz
blackbird-op-linux-476b679a5d785d1244f6b43ad26877acf278cd18.zip
arm/dts: OMAP3+: Add mpu, dsp and iva nodes
Add nodes for devices used by PM code (mpu, dsp, iva). Add a cpus node as well as recommended in the DT spec. Remove mpu, dsp, iva devices init if is populated. Signed-off-by: Benoit Cousson <b-cousson@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Cc: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/omap3.dtsi19
-rw-r--r--arch/arm/boot/dts/omap4.dtsi23
2 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index d558785c8b2c..d202bb5ec7ef 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -13,12 +13,31 @@
/ {
compatible = "ti,omap3430", "ti,omap3";
+ cpus {
+ cpu@0 {
+ compatible = "arm,cortex-a8";
+ };
+ };
+
/*
* The soc node represents the soc top level view. It is uses for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
compatible = "ti,omap-infra";
+ mpu {
+ compatible = "ti,omap3-mpu";
+ ti,hwmods = "mpu";
+ };
+
+ iva {
+ compatible = "ti,iva2.2";
+ ti,hwmods = "iva";
+
+ dsp {
+ compatible = "ti,omap3-c64";
+ };
+ };
};
/*
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index b85a39debbea..4c61c829043a 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -23,12 +23,35 @@
aliases {
};
+ cpus {
+ cpu@0 {
+ compatible = "arm,cortex-a9";
+ };
+ cpu@1 {
+ compatible = "arm,cortex-a9";
+ };
+ };
+
/*
* The soc node represents the soc top level view. It is uses for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
compatible = "ti,omap-infra";
+ mpu {
+ compatible = "ti,omap4-mpu";
+ ti,hwmods = "mpu";
+ };
+
+ dsp {
+ compatible = "ti,omap3-c64";
+ ti,hwmods = "dsp";
+ };
+
+ iva {
+ compatible = "ti,ivahd";
+ ti,hwmods = "iva";
+ };
};
/*
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