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| author | Stephen Warren <swarren@nvidia.com> | 2013-11-15 12:22:53 -0700 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-12-16 14:09:17 -0700 |
| commit | 2f5a913eb59496e37c64449dfdcd66b0bef90630 (patch) | |
| tree | 1e9e390518896b78bca527bc58539334e887e16f /arch/arm/boot/dts/tegra124.dtsi | |
| parent | f71e4f034a57b0203d91aa7c805a12c75f476dab (diff) | |
| download | blackbird-op-linux-2f5a913eb59496e37c64449dfdcd66b0bef90630.tar.gz blackbird-op-linux-2f5a913eb59496e37c64449dfdcd66b0bef90630.zip | |
ARM: tegra: add APB DMA controller to Tegra124 DT
Instantiate the APB DMA controller in the Tegra124 DT, and add all
DMA-related properties to other DT nodes that rely on (reference) the
DMA controller's node.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 4ed6a3a8e2de..9a8b5b8d8397 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -56,6 +56,47 @@ interrupt-controller; }; + apbdma: dma@60020000 { + compatible = "nvidia,tegra124-apbdma", "nvidia,tegra148-apbdma"; + reg = <0x60020000 0x1400>; + interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA124_CLK_APBDMA>; + resets = <&tegra_car 34>; + reset-names = "dma"; + #dma-cells = <1>; + }; + /* * There are two serial driver i.e. 8250 based simple serial * driver and APB DMA based serial driver for higher baudrate @@ -72,6 +113,8 @@ clocks = <&tegra_car TEGRA124_CLK_UARTA>; resets = <&tegra_car 6>; reset-names = "serial"; + dmas = <&apbdma 8>, <&apbdma 8>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -83,6 +126,8 @@ clocks = <&tegra_car TEGRA124_CLK_UARTB>; resets = <&tegra_car 7>; reset-names = "serial"; + dmas = <&apbdma 9>, <&apbdma 9>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -94,6 +139,8 @@ clocks = <&tegra_car TEGRA124_CLK_UARTC>; resets = <&tegra_car 55>; reset-names = "serial"; + dmas = <&apbdma 10>, <&apbdma 10>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -105,6 +152,8 @@ clocks = <&tegra_car TEGRA124_CLK_UARTD>; resets = <&tegra_car 65>; reset-names = "serial"; + dmas = <&apbdma 19>, <&apbdma 19>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -116,6 +165,8 @@ clocks = <&tegra_car TEGRA124_CLK_UARTE>; resets = <&tegra_car 66>; reset-names = "serial"; + dmas = <&apbdma 20>, <&apbdma 20>; + dma-names = "rx", "tx"; status = "disabled"; }; |
