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authorDoug Anderson <dianders@chromium.org>2014-08-12 16:21:14 -0700
committerHeiko Stuebner <heiko@sntech.de>2014-08-16 22:30:56 +0200
commit2c31d9498cb85dcf37806237870e8ccf4dbf84e0 (patch)
tree65100a88190fe33b948c10a41c7d045753bd26d7 /arch/arm/boot/dts/rk3288-evb.dtsi
parent85095bf30f028f6dcb7d8177ab9b00425c11ca58 (diff)
downloadblackbird-op-linux-2c31d9498cb85dcf37806237870e8ccf4dbf84e0.tar.gz
blackbird-op-linux-2c31d9498cb85dcf37806237870e8ccf4dbf84e0.zip
ARM: dts: Enable emmc and sdmmc on the rk3288-evb boards
This enables basic SD and eMMC support. Things are not yet running at the fastest speed and we don't have the regulators specified, but we can at least use the eMMC and SD cards now. A note: * Though MMC DDR50 mode is partially supported in the dw_mmc rk3288-specific code in Addy's patch, Addy's patch doesn't add tuning support. That means DDR50 mode is not reliable. From the 3288 TRM: "Tuning is required for other speed modes-such as DDR50-even though the output delay from the card is less than one cycle." Thus, we don't enable MMC DDR50 mode in this patch. Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-evb.dtsi')
-rw-r--r--arch/arm/boot/dts/rk3288-evb.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi b/arch/arm/boot/dts/rk3288-evb.dtsi
index 4f572093c8b4..ebce49a66a12 100644
--- a/arch/arm/boot/dts/rk3288-evb.dtsi
+++ b/arch/arm/boot/dts/rk3288-evb.dtsi
@@ -49,6 +49,30 @@
};
};
+&emmc {
+ broken-cd;
+ bus-width = <8>;
+ cap-mmc-highspeed;
+ disable-wp;
+ non-removable;
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_pwr &emmc_bus8>;
+ status = "okay";
+};
+
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ card-detect-delay = <200>;
+ disable-wp; /* wp not hooked up */
+ num-slots = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
+ status = "okay";
+};
+
&i2c0 {
status = "okay";
};
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