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authorLina Iyer <lina.iyer@linaro.org>2015-03-25 14:25:33 -0600
committerOlof Johansson <olof@lixom.net>2015-04-03 13:33:54 -0700
commitd596d620d82f64989aaf73144bac82002204d88c (patch)
treed7d0e852b941f017dc5e1f72fbf0fc4e5e4c8989 /arch/arm/boot/dts/qcom-msm8974.dtsi
parent9fc23ce3bfb8c205f2a43de94f3730aa301f2efe (diff)
downloadblackbird-op-linux-d596d620d82f64989aaf73144bac82002204d88c.tar.gz
blackbird-op-linux-d596d620d82f64989aaf73144bac82002204d88c.zip
ARM: dts: qcom: Add idle states device nodes for 8974/8074
Add ARM common idle states device bindings for cpuidle support for APQ 8974/8074. Support Standalone power collapse (SPC) idle state (power down that does not affect any SoC idle states) for each cpu. Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8974.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi14
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 1bb18322a66e..37b47b5538b8 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -22,6 +22,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc0>;
qcom,saw = <&saw0>;
+ cpu-idle-states = <&CPU_SPC>;
};
cpu@1 {
@@ -32,6 +33,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
+ cpu-idle-states = <&CPU_SPC>;
};
cpu@2 {
@@ -42,6 +44,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc2>;
qcom,saw = <&saw2>;
+ cpu-idle-states = <&CPU_SPC>;
};
cpu@3 {
@@ -52,6 +55,7 @@
next-level-cache = <&L2>;
qcom,acc = <&acc3>;
qcom,saw = <&saw3>;
+ cpu-idle-states = <&CPU_SPC>;
};
L2: l2-cache {
@@ -59,6 +63,16 @@
cache-level = <2>;
qcom,saw = <&saw_l2>;
};
+
+ idle-states {
+ CPU_SPC: spc {
+ compatible = "qcom,idle-state-spc",
+ "arm,idle-state";
+ entry-latency-us = <150>;
+ exit-latency-us = <200>;
+ min-residency-us = <2000>;
+ };
+ };
};
cpu-pmu {
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