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| author | Roland Stigge <stigge@antcom.de> | 2012-06-14 16:16:18 +0200 |
|---|---|---|
| committer | Roland Stigge <stigge@antcom.de> | 2012-06-14 16:16:18 +0200 |
| commit | ac5ced91aa6b5013027d3313824c9c5afb071f23 (patch) | |
| tree | 667e75cbeab6c30f8bffd8e72d42501506926239 /arch/arm/boot/dts/phy3250.dts | |
| parent | c70426f1534a7d8e52e478ce67fd4634cc588741 (diff) | |
| download | blackbird-op-linux-ac5ced91aa6b5013027d3313824c9c5afb071f23.tar.gz blackbird-op-linux-ac5ced91aa6b5013027d3313824c9c5afb071f23.zip | |
ARM: LPC32xx: High Speed UART configuration via DT
This patch fixes the DTS files for the High Speed UARTs 1, 2 and 7 of the
LPC32xx SoC, adjusting the compatible strings, adding interrupts and status
configuration. On the PHY3250 reference board, UART2 is enabled.
Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/phy3250.dts')
| -rw-r--r-- | arch/arm/boot/dts/phy3250.dts | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/phy3250.dts b/arch/arm/boot/dts/phy3250.dts index 57d4961372d4..f3bf1493afb0 100644 --- a/arch/arm/boot/dts/phy3250.dts +++ b/arch/arm/boot/dts/phy3250.dts @@ -148,6 +148,10 @@ }; fab { + uart2: serial@40018000 { + status = "okay"; + }; + tsc@40048000 { status = "okay"; }; |
