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authorTero Kristo <t-kristo@ti.com>2015-02-24 16:22:45 +0200
committerTero Kristo <t-kristo@ti.com>2015-03-31 21:26:56 +0300
commitb8845074cfbbd1d1b46720a1b563d7b4240dac21 (patch)
treea3054f3e304854ef4a55e63de53c8729f0a14db2 /arch/arm/boot/dts/omap3xxx-clocks.dtsi
parent72b10ac00eb1c154037e398371685d3f1d2d4793 (diff)
downloadblackbird-op-linux-b8845074cfbbd1d1b46720a1b563d7b4240dac21.tar.gz
blackbird-op-linux-b8845074cfbbd1d1b46720a1b563d7b4240dac21.zip
ARM: dts: omap3: add minimal l4 bus layout with control module support
This patch creates an l4_core interconnect for OMAP3, and moves some of the generic peripherals under it. System control module nodes are moved under this new interconnect also, and the SCM clock layout is changed to use the renamed SCM node as the clock provider. Signed-off-by: Tero Kristo <t-kristo@ti.com> Reported-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3xxx-clocks.dtsi')
-rw-r--r--arch/arm/boot/dts/omap3xxx-clocks.dtsi13
1 files changed, 7 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/omap3xxx-clocks.dtsi b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
index 5c375003bad1..bbba5bdc4bc9 100644
--- a/arch/arm/boot/dts/omap3xxx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap3xxx-clocks.dtsi
@@ -79,13 +79,14 @@
clock-div = <1>;
};
};
-&scrm_clocks {
+
+&scm_clocks {
mcbsp5_mux_fck: mcbsp5_mux_fck {
#clock-cells = <0>;
compatible = "ti,composite-mux-clock";
clocks = <&core_96m_fck>, <&mcbsp_clks>;
ti,bit-shift = <4>;
- reg = <0x02d8>;
+ reg = <0x68>;
};
mcbsp5_fck: mcbsp5_fck {
@@ -99,7 +100,7 @@
compatible = "ti,composite-mux-clock";
clocks = <&core_96m_fck>, <&mcbsp_clks>;
ti,bit-shift = <2>;
- reg = <0x0274>;
+ reg = <0x04>;
};
mcbsp1_fck: mcbsp1_fck {
@@ -113,7 +114,7 @@
compatible = "ti,composite-mux-clock";
clocks = <&per_96m_fck>, <&mcbsp_clks>;
ti,bit-shift = <6>;
- reg = <0x0274>;
+ reg = <0x04>;
};
mcbsp2_fck: mcbsp2_fck {
@@ -126,7 +127,7 @@
#clock-cells = <0>;
compatible = "ti,composite-mux-clock";
clocks = <&per_96m_fck>, <&mcbsp_clks>;
- reg = <0x02d8>;
+ reg = <0x68>;
};
mcbsp3_fck: mcbsp3_fck {
@@ -140,7 +141,7 @@
compatible = "ti,composite-mux-clock";
clocks = <&per_96m_fck>, <&mcbsp_clks>;
ti,bit-shift = <2>;
- reg = <0x02d8>;
+ reg = <0x68>;
};
mcbsp4_fck: mcbsp4_fck {
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