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| author | Hongzhou Yang <hongzhou.yang@mediatek.com> | 2015-05-01 14:49:30 +0800 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2015-05-04 10:56:07 +0200 |
| commit | cfb1167126613230f38f4c45b9e9bcb22791df8b (patch) | |
| tree | 44b144df3e8ee10d1e90743a489abf32d8c0ec88 /arch/arm/boot/dts/mt8135.dtsi | |
| parent | b787f68c36d49bb1d9236f403813641efa74a031 (diff) | |
| download | blackbird-op-linux-cfb1167126613230f38f4c45b9e9bcb22791df8b.tar.gz blackbird-op-linux-cfb1167126613230f38f4c45b9e9bcb22791df8b.zip | |
ARM: dts: mt8135: Add pinctrl/GPIO/EINT node for mt8135.
Add pinctrl,GPIO and EINT node to mt8135.dtsi.
Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/mt8135.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/mt8135.dtsi | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mt8135.dtsi b/arch/arm/boot/dts/mt8135.dtsi index a161e99ffcc4..0aba9eb28e2b 100644 --- a/arch/arm/boot/dts/mt8135.dtsi +++ b/arch/arm/boot/dts/mt8135.dtsi @@ -15,6 +15,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include "skeleton64.dtsi" +#include "mt8135-pinfunc.h" / { compatible = "mediatek,mt8135"; @@ -101,6 +102,29 @@ compatible = "simple-bus"; ranges; + /* + * Pinctrl access register at 0x10005000 and 0x1020c000 through + * regmap. Register 0x1000b000 is used by EINT. + */ + pio: pinctrl@10005000 { + compatible = "mediatek,mt8135-pinctrl"; + reg = <0 0x1000b000 0 0x1000>; + mediatek,pctl-regmap = <&syscfg_pctl_a &syscfg_pctl_b>; + pins-are-numbered; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; + }; + + syscfg_pctl_a: syscfg_pctl_a@10005000 { + compatible = "mediatek,mt8135-pctl-a-syscfg", "syscon"; + reg = <0 0x10005000 0 0x1000>; + }; + timer: timer@10008000 { compatible = "mediatek,mt8135-timer", "mediatek,mt6577-timer"; @@ -119,6 +143,11 @@ reg = <0 0x10200030 0 0x1c>; }; + syscfg_pctl_b: syscfg_pctl_b@1020c000 { + compatible = "mediatek,mt8135-pctl-b-syscfg", "syscon"; + reg = <0 0x1020c000 0 0x1000>; + }; + gic: interrupt-controller@10211000 { compatible = "arm,cortex-a15-gic"; interrupt-controller; |
