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author | Shawn Guo <shawn.guo@linaro.org> | 2012-08-11 10:47:14 +0800 |
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committer | Shawn Guo <shawn.guo@linaro.org> | 2012-09-11 16:26:46 +0800 |
commit | 99d5f0cc17c0c7191e1bb9dc40849a1711a77439 (patch) | |
tree | 76637133a9108e44e221d617c4aae69becee3b51 /arch/arm/boot/dts/imx6q.dtsi | |
parent | 52ccd4920301b9fecbac577ad4283995730ecf76 (diff) | |
download | blackbird-op-linux-99d5f0cc17c0c7191e1bb9dc40849a1711a77439.tar.gz blackbird-op-linux-99d5f0cc17c0c7191e1bb9dc40849a1711a77439.zip |
ARM: dts: imx6q-sabrelite: add pinctrl for usdhc and enet
Add missing pinctrl of usdhc and enet for imx6q-sabrelite board.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6q.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6q.dtsi | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index 5612ccf2a563..9d180220212a 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -532,6 +532,28 @@ }; }; + enet { + pinctrl_enet_1: enetgrp-1 { + fsl,pins = < + 695 0x1b0b0 /* MX6Q_PAD_ENET_MDIO__ENET_MDIO */ + 756 0x1b0b0 /* MX6Q_PAD_ENET_MDC__ENET_MDC */ + 24 0x1b0b0 /* MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC */ + 30 0x1b0b0 /* MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0 */ + 34 0x1b0b0 /* MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1 */ + 39 0x1b0b0 /* MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2 */ + 44 0x1b0b0 /* MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3 */ + 56 0x1b0b0 /* MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL */ + 702 0x1b0b0 /* MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK */ + 74 0x1b0b0 /* MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC */ + 52 0x1b0b0 /* MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0 */ + 61 0x1b0b0 /* MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1 */ + 66 0x1b0b0 /* MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2 */ + 70 0x1b0b0 /* MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3 */ + 48 0x1b0b0 /* MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL */ + >; + }; + }; + gpmi-nand { pinctrl_gpmi_nand_1: gpmi-nand-1 { fsl,pins = < @@ -591,6 +613,17 @@ 1241 0x17059 /* MX6Q_PAD_SD3_DAT7__USDHC3_DAT7 */ >; }; + + pinctrl_usdhc3_2: usdhc3grp-2 { + fsl,pins = < + 1273 0x17059 /* MX6Q_PAD_SD3_CMD__USDHC3_CMD */ + 1281 0x10059 /* MX6Q_PAD_SD3_CLK__USDHC3_CLK */ + 1289 0x17059 /* MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 */ + 1297 0x17059 /* MX6Q_PAD_SD3_DAT1__USDHC3_DAT1 */ + 1305 0x17059 /* MX6Q_PAD_SD3_DAT2__USDHC3_DAT2 */ + 1312 0x17059 /* MX6Q_PAD_SD3_DAT3__USDHC3_DAT3 */ + >; + }; }; usdhc4 { @@ -608,6 +641,17 @@ 1517 0x17059 /* MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 */ >; }; + + pinctrl_usdhc4_2: usdhc4grp-2 { + fsl,pins = < + 1386 0x17059 /* MX6Q_PAD_SD4_CMD__USDHC4_CMD */ + 1392 0x10059 /* MX6Q_PAD_SD4_CLK__USDHC4_CLK */ + 1462 0x17059 /* MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 */ + 1470 0x17059 /* MX6Q_PAD_SD4_DAT1__USDHC4_DAT1 */ + 1478 0x17059 /* MX6Q_PAD_SD4_DAT2__USDHC4_DAT2 */ + 1486 0x17059 /* MX6Q_PAD_SD4_DAT3__USDHC4_DAT3 */ + >; + }; }; }; |